Feng Yi Dai

US Patent:

6977217, Dec 20, 2005

Filed:

Dec 3, 2002

Appl. No.:

10/308410

Inventors:

Mira Ben-Tzur - Sunnyvale CA, US
Gorley L. Lau - Fremont CA, US
Ivan P. Ivanov - Apple Valley MN, US
Feng Dai - San Jose CA, US

Assignee:

Cypress Semiconductor Corporation - San Jose CA

International Classification:

H01L021/4763
H01L021/44

US Classification:

438627, 438637, 438660, 438688

Abstract:

In one embodiment, a via structure includes a liner, a barrier layer over the liner, and an aluminum layer over the barrier layer. The barrier layer helps minimize reaction between the aluminum layer and the liner, thus helping minimize void formation in the via. The liner and the barrier layer may be deposited in-situ by ionized metal plasma (IMP) physical vapor deposition (PVD). In one embodiment, the liner comprises titanium, while the barrier layer comprises titanium nitride.

US Patent:

7166902, Jan 23, 2007

Filed:

Nov 15, 2004

Appl. No.:

10/988812

Inventors:

Fuad Badrieh - Santa Clara CA, US
Feng Dai - San Jose CA, US
Bartosz Banachowicz - Santa Clara CA, US
Roger J. Bettman - Los Altos CA, US

Assignee:

Cypress Semiconductor Corporation - San Jose CA

International Classification:

H01L 21/425

US Classification:

257532, 257303, 257534, 257535

Abstract:

In one embodiment, an electrically conductive trench in an integrated circuit allows for the formation of capacitors between the trench and other portions of the integrated circuit. For example, a capacitor may be formed between the trench and an electrically conductive line. Among other advantages, the capacitor provides a relatively large capacitance while occupying a relatively small area.

US Patent:

7401758, Jul 22, 2008

Filed:

Jun 3, 2004

Appl. No.:

10/860992

Inventors:

Scott C. J. Tseng - San Jose CA, US
Jerry Chung - Mountain View CA, US
HongMei Zang - Sunnyvale CA, US
Xiaojia Wang - Fremont CA, US
Yi-Shung Chaug - Cupertino CA, US
Feng Y. Dai - Cerritos CA, US

Assignee:

SiPix Imaging, Inc. - Fremont CA

International Classification:

B29C 45/14
B29B 7/22

US Classification:

249112, 2642711

Abstract:

This invention relates to an object having a display panel embedded in its top surface and processes for its manufacture. This invention also relates to an in-mold display transfer film or foil, which comprises a temporary carrier film, a release layer, a display panel, an adhesive or tie layer and optionally a durable layer.

US Patent:

20030104676, Jun 5, 2003

Filed:

Nov 30, 2001

Appl. No.:

10/002987

Inventors:

Feng Dai - San Jose CA, US
Pang Hau - Singapore, SG
Peter Hing - Singapore, SG
Lap Chan - San Francisco CA, US

Assignee:

Chartered Semiconductor Manufacturing Ltd.

International Classification:

H01L021/76
H01L029/76

US Classification:

438/424000, 257/406000

Abstract:

A new method of forming shallow trench isolations without using CMP is described. A plurality of isolation trenches are etched through an etch stop layer into the semiconductor substrate leaving narrow and wide active areas between the trenches. An oxide layer is deposited over the etch stop layer and within the trenches using a high density plasma chemical vapor deposition process (HDP-CVD) having a deposition component and a sputtering component wherein after the oxide layer fills the trenches, the deposition component is discontinued while continuing the sputtering component until the oxide layer is at a desired depth. In one method, the oxide layer overlying the etch stop layer in the wide active areas is etched away. The etch stop layer and oxide layer residues are removed to complete planarized STI regions. In another method, a second etch stop layer is deposited over the oxide layer using a HDP-CVD process whereby the second etch stop layer is sputtered away over the oxide layer overlying the first etch stop layer in the narrow active areas and whereby the second etch stop layer remains in the wide active areas. The second etch stop layer over the oxide layer in the wide active areas is etched away. The oxide layer overlying the first etch stop layer in the narrow and wide active areas is etched away. The first and second etch stop layers are removed to complete STI regions.

US Patent:

20080224361, Sep 18, 2008

Filed:

May 21, 2008

Appl. No.:

12/124833

Inventors:

Scott C.J. Tseng - San Jose CA, US
Jerry Chung - Mountain View CA, US
HongMei Zang - Sunnyvale CA, US
Xiaojia Wang - Fremont CA, US
Y. S. Chaug - Cupertino CA, US
Feng Y. Dai - Cerritos CA, US

International Classification:

B29C 33/68
B29C 45/14
B29C 49/20
B29C 51/12

US Classification:

264510, 264278, 26427215

Abstract:

This invention relates to an object having a display panel embedded in its top surface and processes for its manufacture. The process comprises the steps of: forming an in-mold display transfer film or foil which comprises a temporary carrier layer, a release layer, a display panel, an adhesive layer and optionally a durable layer; feeding said in-mold display transfer film or foil into a mold with the temporary carrier film in contact with the inner surface of the mold; forming an object in the mold and transferring the in-mold display transfer film or foil onto the object; removing the object formed from the mold; and simultaneously removing both temporary carrier layer and release layer.