Hyun S Choi

US Patent:

8427195, Apr 23, 2013

Filed:

May 10, 2012

Appl. No.:

13/468668

Inventors:

Seong Kwan Lee - Suwon-si, KR
Hyun Woo Choi - Atlanta GA, US
Sung Yeol Kim - Yogin-si, KR
David Keezer - Atlanta GA, US
Carl Gray - Atlanta GA, US
Te-Hui Chen - Atlanta GA, US

Assignee:

Samsung Electronics Co., Ltd. - Gyeonggi-Do
Georgia Tech Research Corporation - Atlanta GA

International Classification:

H03K 19/00

US Classification:

326 16, 326 52, 324 731, 714738

Abstract:

A digital signal generator includes an input unit configured to receive signal information of a target data signal, a controller configured to calculate at least two delay values and at least two data values, the at least two delay values and the at least two data values being used to generate a data signal corresponding to the signal information input through the input unit, a multi-phase clock generator configured to delay a reference clock signal based on the at least two delay values to generate at least two clock signals having different phases, a signal generator configured to generate at least two data signals by assigning the at least two data values to the at least two clock signals, and a logic gate unit configured to generate the data signal corresponding to the signal information input through the input unit based on the at least two data signals.