Khosrow K Sadeghi

US Patent:

60114452, Jan 4, 2000

Filed:

Aug 1, 1998

Appl. No.:

9/144205

Inventors:

Vaishali Nikhade - Irvine CA
Khosrow Sadeghi - Irvine CA

Assignee:

ADMTEK Incorporated - Hsinchu

International Classification:

H03B 524
H03B 506
H03L 7099
H03L 7113

US Classification:

331173

Abstract:

The present invention provides a reliable method for oscillating an oscillator having an oscillator output without fail. The method includes steps of detecting whether the oscillator is regularly oscillating, and releasing the oscillator to oscillate when the oscillator is regularly oscillating, and holding the oscillator from oscillating until an enough control voltage is built-up therefor when the oscillator is not regularly oscillating. The present invention also provides a start up circuit for an oscillator having an oscillator output having a first state in a first instance and a second state in a second instance. The start up circuit includes a detecting device which includes a first input end for inputting therethrough the oscillator output, and a detecting output having a third state in a third instance and a fourth state in a fourth instance such that when the detecting output is in the third state, the oscillator is in a first work mode, and when the detecting output is in the fourth state, the oscillator is in a second work mode.

US Patent:

56872011, Nov 11, 1997

Filed:

Sep 24, 1996

Appl. No.:

8/719310

Inventors:

Kelly Patrick McClellan - Irvine CA
Khosrow Haj Sadeghi - Irvine CA

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03D 324

US Classification:

375374

Abstract:

A phase-locked-loop (PLL) has a current controlled oscillator (ICO) whose gain varies with its input current. The PLL also contains a charge pump that controls the input current of the ICO and therefore the output frequency of the ICO. The charge pump has a gain that is controlled by the ICO input current in a manner which linearizes the combination of charge pump and ICO. This results in a substantially constant loop gain for a PLL.

US Patent:

56126484, Mar 18, 1997

Filed:

Mar 14, 1995

Appl. No.:

8/403931

Inventors:

Kelly P. McClellan - Irvine CA
Khosrow H. Sadeghi - Irvine CA

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

H03F 345
H03F 3191

US Classification:

330253

Abstract:

A G. sub. m -C filter is formed using transconductor elements having first and second degeneration FETs to which first and second control signals are applied. A phase-locked-loop is used to generate the control signals. The control range of the transconductor elements is increased so that the frequency response of the filter can be maintained over increased ranges of various parameters (e. g. , supply voltage variations, temperature variations, etc. ).