Formfactor Inc.
Senior Technical Director of Signal Integrity, Design Engineering
Formfactor Inc. 2007 - 2010
Senior Manager of Electrical Design
Formfactor Inc. 2007 - 2010
Technical Director of Electrical Design
Formfactor Inc. 1997 - 2007
Electrical Design Engineer
Ravisent Technology 1995 - 1997
Electrical Design Engineer
Education:
University of Pennsylvania 1990 - 1995
Bachelors, Bachelor of Science, Electrical Engineering
Skills:
Analog Signal Integrity Pcb Design Semiconductors Simulations Electronics Pads Mems Electrical Engineering Engineering Management Mixed Signal Semiconductor Industry Allegro Analog Circuit Design Soc Cadence Testing Product Development Dft Electronics Packaging Ic Agilent Ads Technical Training Test Equipment Power Analysis Failure Analysis Ansys Circuit Simulation Parasitic Extraction Allegro Skill Programming Project Management Q3D Hfss Wikimedia Design For Manufacturing Eda Test Engineering Analog Design Ansoft Designer Electromagnetic Compatibility
Interests:
Exercise Sweepstakes Home Improvement Shooting Reading Sports Home Decoration Photograph Cooking Gardening Cruises Outdoors Electronics Music Movies Collecting Kids Travel Investing Traveling Sports Memorabilia Collecting
Charles A. Miller - Fremont CA, US Jim Chih-Chiang Tseng - Dublin CA, US
Assignee:
FormFactor, Inc. - Livermore CA
International Classification:
G01R 27/04
US Classification:
3241581
Abstract:
Bandwidth of a test channel is determined from a single port Time Domain Reflectometer (TDR) measurement with the channel terminated in a short or an open circuit. Bandwidth is estimated by: (1) making a TDR measurement of a channel terminated in a short or open circuit; (2) determining a maximum slope of the reflection from the TDR measurement; (3) calculating an interpolated rise or fall time, for example by taking 80% of the applied voltage between the 10% and 90% points, and then dividing the applied voltage by the maximum slope determined; (4) dividing the overall interpolated rise time by the square root of two to account for the TDR signal proceeding through the channel twice; (5) removing the contribution of rise time from measurement equipment; and (6) completing calculation of channel bandwidth using a formula to relate bandwidth to rise time, such as: bandwidth=0. 35/rise time.
Method Of Estimating Channel Bandwidth From A Time Domain Reflectometer (Tdr) Measurement
Charles A. Miller - Fremont CA, US Jim Chih-Chiang Tseng - Dublin CA, US
International Classification:
G01R 27/06
US Classification:
324642
Abstract:
Bandwidth of a test channel is determined from a single port Time Domain Reflectometer (TDR) measurement with the channel terminated in a short or an open circuit. Bandwidth is estimated by: (1) making a TDR measurement of a channel terminated in a short or open circuit; (2) determining a maximum slope of the reflection from the TDR measurement; (2) calculating an interpolated rise or fall time, for example by taking 80% of the applied voltage between the 10% and 90% points, and then dividing the applied voltage by the maximum slope determined; (3) dividing the overall interpolated rise time by the square root of two to account for the TDR signal proceeding through the channel twice; (4) removing the contribution of rise time from measurement equipment; and (5) completing calculation of channel bandwidth using a formula to relate bandwidth to rise time, such as: bandwidth=0.35/rise time.
Gary W. Grube - Pleasanton CA, US Igor Y. Khandros - Orinda CA, US Benjamin N. Eldridge - Danville CA, US Gaetan L. Mathieu - Livermore CA, US Poya Lotfizadeh - San Francisco CA, US Jim Chih-Chiang Tseng - Dublin CA, US
Assignee:
FormFactor, Inc. - Livermore CA
International Classification:
G01R 31/02 G01R 31/26 G06F 17/50
US Classification:
324754, 716 10, 716 15, 438 14
Abstract:
A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.