Jim Tseng from Cupertino, CA, age 40

Resumes

Senior Principle Engineer

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Location:

San Jose, CA

Industry:

Semiconductors

Work:

Broadcom
Senior Principle Engineer

Education:

National Tsing Hua University
Bachelors, Bachelor of Science, Electrical Engineering University of Southern California
Master of Science, Masters, Electrical Engineering

Skills:

Asic
Soc
Ic

Director

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Location:

San Jose, CA

Work:

Summer Capital
Director
Viewfinder Asset Management 2014 - 2016
Director
Jih Sun Securities Investment Consulting 2009 - 2011
Senier Vice President
Fubon Financial Holding Co., Ltd. 富邦金控 2007 - 2009
Vice President
Capstone Investment Advisors 2004 - 2007
Financial Engineer

Education:

Nyu Stern School of Business 1996 - 2000
Master of Business Administration, Masters, Finance Stevens Institute of Technology 1989 - 1991
Masters, Master of Engineering, Engineering, Electronics Engineering Stevens Institute of Technology 1988 - 1989
Master of Science, Masters, Computer Science Fu Jen Catholic University 1981 - 1985
Bachelors, Bachelor of Science National University Preparatory School For Overseas Chinese Students 1978 - 1981
New York University
Taipei Tsai Hsing High School
Stevens Institute of Technology
Masters, Electrical Engineering

Skills:

Risk Management
Capital Markets
Hedge Funds
Leadership
Portfolio Management
Program Management
Strategy
Equities
Financial Risk
Business Strategy
Fixed Income
Derivatives
Investment Banking
Project Management
Trading Systems

Cook

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Location:

Cupertino, CA

Industry:

Hospitality

Work:

Michael Mina Restaurant
Cook
Sent Sovi
Line Cook
Red Hot Chilli Pepper May 2011 - Nov 2011
Sous Chef
Bon Appétit Management Company Feb 2006 - Oct 2006
Line Cook

Education:

The Culinary Institute of America 2006 - 2010
Bachelor of Applied Science, Bachelors, Management San Francisco State University 2004 - 2005

Skills:

Food and Beverage
Restaurants
Menu Development
Cooking
Hospitality
Catering
Banquets
Culinary Skills
Hospitality Management
Hotels
Restaurant Management
Hospitality Industry
Customer Service
Fine Dining
Food
Food Service

Languages:

Mandarin

Jim Tseng

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Location:

San Jose, CA

Us Patents

Method Of Estimating Channel Bandwidth From A Time Domain Reflectometer (Tdr) Measurement Using Rise Time And Maximum Slope
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US Patent:

7525302, Apr 28, 2009
Filed:

Jan 31, 2005
Appl. No.:

11/048383
Inventors:

Charles A. Miller - Fremont CA, US
Jim Chih-Chiang Tseng - Dublin CA, US
Assignee:

FormFactor, Inc. - Livermore CA
International Classification:

G01R 27/04
US Classification:

3241581
Abstract:

Bandwidth of a test channel is determined from a single port Time Domain Reflectometer (TDR) measurement with the channel terminated in a short or an open circuit. Bandwidth is estimated by: (1) making a TDR measurement of a channel terminated in a short or open circuit; (2) determining a maximum slope of the reflection from the TDR measurement; (3) calculating an interpolated rise or fall time, for example by taking 80% of the applied voltage between the 10% and 90% points, and then dividing the applied voltage by the maximum slope determined; (4) dividing the overall interpolated rise time by the square root of two to account for the TDR signal proceeding through the channel twice; (5) removing the contribution of rise time from measurement equipment; and (6) completing calculation of channel bandwidth using a formula to relate bandwidth to rise time, such as: bandwidth=0. 35/rise time.

Method Of Estimating Channel Bandwidth From A Time Domain Reflectometer (Tdr) Measurement
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US Patent:

20090212790, Aug 27, 2009
Filed:

Apr 28, 2009
Appl. No.:

12/431037
Inventors:

Charles A. Miller - Fremont CA, US
Jim Chih-Chiang Tseng - Dublin CA, US
International Classification:

G01R 27/06
US Classification:

324642
Abstract:

Bandwidth of a test channel is determined from a single port Time Domain Reflectometer (TDR) measurement with the channel terminated in a short or an open circuit. Bandwidth is estimated by: (1) making a TDR measurement of a channel terminated in a short or open circuit; (2) determining a maximum slope of the reflection from the TDR measurement; (2) calculating an interpolated rise or fall time, for example by taking 80% of the applied voltage between the 10% and 90% points, and then dividing the applied voltage by the maximum slope determined; (3) dividing the overall interpolated rise time by the square root of two to account for the TDR signal proceeding through the channel twice; (4) removing the contribution of rise time from measurement equipment; and (5) completing calculation of channel bandwidth using a formula to relate bandwidth to rise time, such as: bandwidth=0.35/rise time.

Method Of Manufacturing A Probe Card
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US Patent:

7196531, Mar 27, 2007
Filed:

Mar 4, 2005
Appl. No.:

11/073187
Inventors:

Gary W. Grube - Pleasanton CA, US
Igor Y. Khandros - Orinda CA, US
Benjamin N. Eldridge - Danville CA, US
Gaetan L. Mathieu - Livermore CA, US
Poya Lotfizadeh - San Francisco CA, US
Jim Chih-Chiang Tseng - Dublin CA, US
Assignee:

FormFactor, Inc. - Livermore CA
International Classification:

G01R 31/02
G01R 31/26
G06F 17/50
US Classification:

324754, 716 10, 716 15, 438 14
Abstract:

A method of designing and manufacturing a probe card assembly includes prefabricating one or more elements of the probe card assembly to one or more predefined designs. Thereafter, design data regarding a newly designed semiconductor device is received along with data describing the tester and testing algorithms to be used to test the semiconductor device. Using the received data, one or more of the prefabricated elements is selected. Again using the received data, one or more of the selected prefabricated elements is customized. The probe card assembly is then built using the selected and customized elements.