James Herbert Congdon

Author:

James Congdon

ISBN #:

0356144011

US Patent:

6639777, Oct 28, 2003

Filed:

Oct 30, 2001

Appl. No.:

10/012184

Inventors:

James S. Congdon - Sudbury MA 01776

International Classification:

H02H 300

US Classification:

361 94

Abstract:

A timer switch for suspending the application of a direct current input voltage to a load upon the detection of a voltage irregularity in the input voltage. The timer switch includes a transistor switch for selectively connecting the input voltage to the load. The timer switch also includes a timing element which detects the presence of a voltage irregularity in the input voltage and controls the state of the transistor switch based upon the detection of a voltage irregularity in the input voltage. The timer switch includes exactly three terminals and is powered by the input voltage. The timing element includes exactly one energy storage element which is represented as a capacitor.

US Patent:

6958623, Oct 25, 2005

Filed:

Jan 18, 2002

Appl. No.:

10/466789

Inventors:

James S. Congdon - Sudbury MA, US

International Classification:

H03K017/16

US Classification:

326 24, 326 81, 326119, 326121, 327206, 327427

Abstract:

A noninverting transistor switch having only a first terminal, a second terminal and a third terminal includes a transistor connected to the second and third terminals, the transistor having an on switching state in which current is able to pass between the second and third terminals and an off switching state in which current is interrupted from passing between the second and third terminals. The transistor switch also includes a voltage stabilizer connected to the second and third terminals. The transistor switch further includes a CMOS inverter connected to the first terminal, the second terminal, the transistor and the voltage stabilizer. In use, the CMOS inverter interrupts the passing of current between the voltage stabilizer and the second terminal when the transistor is in its off switching state.

US Patent:

45945586, Jun 10, 1986

Filed:

Apr 12, 1985

Appl. No.:

6/722598

Inventors:

James S. Congdon - Sudbury MA

Assignee:

Genrad, Inc. - Concord MA

International Classification:

H03F 114
H03F 326

US Classification:

330 9

Abstract:

A driver-sensor circuit for a circuit-testing device has a sensor amplifier (Q1, Q2, Q3, and Q4) for sensing the voltage on a device under test connected to its input-output terminal (12). The driver-sensor circuit also includes a driver amplifier (Q5, Q6, Q7, and Q8) for driving the same terminal (12). The driver amplifier (Q5, Q6, Q7, and Q8) can be switched on and off, and a limiting amplifier (Q9, Q10, Q11, and Q12) applies the sensor-amplifier output voltage to the input terminal (20) of the driver circuit (Q5, Q6, Q7, and Q8) to keep the reverse bias on the driver-amplifier transistors (Q5, Q6, Q7, and Q8) to a minimum. To eliminate offset bias current at the input terminal 12 of the sense amplifier (Q1, Q2, Q3, and Q4), compensation transistors (Q15, Q16 ) matching the input-stage transistors (Q1, Q2) of the driver amplifier have their bases tied together to force their base currents to cancel. The resultant emitter currents of the compensation transistors (Q15, Q16) are sensed by amplifiers (52, 54) that control the emitter currents of the first-stage transistors (Q1 and Q2) so that their emitter currents are the same as the emitter currents of the compensation transistors (Q15, Q16). In this way, the base currents of the first-stage transistors (Q1, Q2) are forced to be opposite and thus cancel.

US Patent:

51343231, Jul 28, 1992

Filed:

Aug 3, 1990

Appl. No.:

7/562215

Inventors:

James E. Congdon - Sudbury MA

International Classification:

H03K 1760
H03K 17687

US Classification:

307574

Abstract:

A noninverting transistor switch having only three terminals includes in one embodiment first, second and third terminals, a depletion mode field effect transistor (FET) having drain and source electrodes that define a current path in the transistor and are connected to the third and second terminals respectively and a gate electrode for controlling the current flow in the transistor current path. A negative voltage converter having an input electrode, an output electrode and a return electrode has its output electrode coupled to the gate electrode in the FET its return electrode being coupled to the source electrode and its input electrode coupled to the first terminal. In operation, the current flow between the drain and source electrodes will be high when a low signal is applied to the input electrode with respect to the source electrode and will be lower when a higher signal is applied to the input electrode with respect to the source electrode.

US Patent:

45231540, Jun 11, 1985

Filed:

May 18, 1983

Appl. No.:

6/495670

Inventors:

James S. Congdon - Maynard MA

Assignee:

GenRad, Inc. - Concord MA

International Classification:

H03F 304

US Classification:

330266

Abstract:

A DC amplifier uses complementary npn and pnp output transistors on n-type and p-type substrates, respectively. The output transistors are in an emitter-follower configuration with no emitter resistor to prevent thermal runaway. Instead, emitter-follower driver-stage transistors are provided on the same substrates as the output transistors to force a reduction in the bias voltage on the output stage when the temperature of an output transistor increases. This circuit prevents thermal runaway and temperature-dependent offsets without emitter resistors, which would increase output impedance, and without feedback from the output stage to the input stage, which would slow the response of the amplifier. Additionally, compensation-network transistors are provided to eliminate offsets resulting from driver- and output-transistor base-to-emitter voltage differences caused not only by temperature differences between the transistors on different substrates but also by manufacturing variations. The compensation-network transistors, like the driver-stage transistors, are on the same substrates as the output transistors.

US Patent:

62592920, Jul 10, 2001

Filed:

Apr 21, 1999

Appl. No.:

9/295931

Inventors:

James S. Congdon - Sudbury MA

International Classification:

H03K 312

US Classification:

327206

Abstract:

An inverting hysteretic transistor switch having an input terminal, an output terminal and a ground terminal includes, in some embodiments, a metal-oxide semiconductor field effect transistor (MOSFET) having an on switching state and an off switching state. The MOSFET includes a drain terminal connected to the output terminal, a gate terminal and a source terminal connected to the ground terminal. The switch further includes a hysteresis circuit connected to the input terminal and to the gate terminal of the MOSFET. In use, with an input voltage having low-to-high and high-to-low input voltage transitions applied to the input terminal, the hysteresis circuit switches the MOSFET to its on switching state at a first threshold voltage during low-to-high input voltage transitions. In addition, the hyteresis circuit switches the MOSFET to its off switching state at a second threshold voltage, which is less than the first threshold voltage, during high-to-low input voltage transitions.