Edward Y Chen

US Patent:

6532018, Mar 11, 2003

Filed:

Apr 19, 1999

Appl. No.:

09/294546

Inventors:

Edward C. Chen - Los Altos CA
Mark S. Grossman - Palo Alto CA
Chi-Shung Wang - Fremont CA
John S. Montrym - Los Altos CA
Mark M. Leather - Saratoga CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 1314

US Classification:

345519, 345546, 345552, 345611

Abstract:

A method and apparatus for graphical processing. A logic core to perform pixel fragment manipulation and processing is instantiated on a single substrate with one or more memory units. The memory units are dynamically segmentable into frame buffer and texture memory. Because the logic core is on the same substrate as the memory units, the bandwidth between the core and the memory is greatly increased.

US Patent:

6756978, Jun 29, 2004

Filed:

Apr 19, 1999

Appl. No.:

09/294450

Inventors:

Edward C. Chen - Los Altos CA
Michael T. Jones - San Jose CA
Mark Stefan Grossman - Palo Alto CA
Philippe G. Lacroute - Sunnyvale CA
John Montrym - Los Altos CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06T 1500

US Classification:

345419, 345441

Abstract:

A computer-implemented method for generating three-dimensional images by reusing multisample memory. Pixels corresponding to a first section of the overall display are multisampled. The multisampled pixel values corresponding to the first section of the display are stored in a multisample memory. The final pixel values corresponding to the first section of the display are stored in a frame buffer. Thereupon, multisampling is performed on those pixels belonging to a second section of the overall display. The same multisample memory is reused to store the multisampled pixel values corresponding to the second section of the display. In other words, the same piece of multisample memory is shared between the first and second portions of the display, thereby minimizing the amount of multisample memory that is needed. The final pixel values corresponding to the second section of the display are stored in the frame buffer. This process is repeated until multisampling has been performed over the entire display area.

US Patent:

6760033, Jul 6, 2004

Filed:

Oct 4, 2002

Appl. No.:

10/264524

Inventors:

Edward C. Chen - Los Altos CA
Mark S. Grossman - Palo Alto CA
Chi-Shung Wang - Fremont CA
John S. Montrym - Los Altos CA
Mark M. Leather - Saratoga CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 1314

US Classification:

345519, 345543, 345545, 345552

Abstract:

A method and apparatus for graphical processing. A logic core to perform pixel fragment manipulation and processing is instantiated on a single substrate with one or more memory units. The memory units are dynamically segmentable into frame buffer and texture memory. Because the logic core is on the same substrate as the memory units, the bandwidth between the core and the memory is greatly increased.

US Patent:

8380146, Feb 19, 2013

Filed:

Dec 31, 2009

Appl. No.:

12/650718

Inventors:

Ray Parkhurst - Santa Clara CA, US
Edward Chen - Fremont CA, US
William Carrol Mueller - Mountain View CA, US

Assignee:

Avago Technologies Wireless IP (Singapore) Pte. Ltd. - Singapore

International Classification:

H01Q 11/12
H04B 1/04
H04M 1/00

US Classification:

4551273, 4555521, 330124 R

Abstract:

A device includes: an input for receiving an RF input signal having a signal format selected among a plurality of signal formats, including at least one signal format to be linearly amplified, and at least another signal format be amplified in saturation; at least a first and a second output; a first amplification path from the input to the first output that includes a first amplifier that operates in a linear amplification mode with respect to the RF input signal; a second amplification path from the input port to the second output that includes the first amplifier, and a second amplifier that operates in saturated amplification with respect to the RF input signal; and a path selection device that selectively passes the RF input signal through the first amplification path or the second amplification path in response to the selected signal format of the RF input signal.

US Patent:

60381469, Mar 14, 2000

Filed:

Jun 13, 1997

Appl. No.:

8/874412

Inventors:

Edward Han Chen Luo - San Jose CA
Piotr Markowski - Warsaw, PL
Fu-Sheng Tsai - Northboro MA

Assignee:

Computer Products, Incorporated - Fremont CA

International Classification:

H02M 3335
H02M 324
H02M 542
H02M 7217

US Classification:

363 21

Abstract:

An AC-to-DC power converter (power supply) with high power factors and which minimizes the input charging current flowing through the separate inductor by locating the separate inductor between a full-bridge rectifier and the transformer but out of the storage capacitor's current path. In this manner, when the input voltage is sufficiently high, the converter draws input current into the transformer through the separate inductor, while current flowing to and charging the storage capacitor is unimpeded by the separate inductor. The current being drawn through the separate inductor and into the transformer may also be used to recharge the storage capacitor. Associated losses are reduced and the separate inductor may be reduced in size. Other embodiments eliminate the second primary winding in the transformer and place a second set of windings coupled to the separate inductor between the full-bridge rectifier and the storage capacitor, which reduces the current spike when the storage capacitor is recharged with current flowing through this path.

Author:

Edward S. Chen

ISBN #:

0471326224

Author:

Edward S. Chen

ISBN #:

0873391330

Author:

Edward S. Chen

ISBN #:

0873393309

Author:

Edward Chen

ISBN #:

0072230118