- Santa Clara CA, US Arul Ramalingam - Fremont CA, US
International Classification:
H04L 12/931 H04L 12/933 H04Q 1/02
Abstract:
In some implementations, a switch card is provided. The switch card includes a set of switch chips configured to communicate data with a plurality of line cards. The plurality of line cards is coupled to a second switch card. The second switch card comprises a second set of switch chips. The switch card also includes a communication component coupled to the set of switch chips. The communication component is configured to determine whether the switch card should operate in a master mode or a slave mode. In response to determining that the switch card should operate in the master mode, the switch card is also configured to receive control plane data from a supervisor card. The switch card is further configured to communicate the control plane data to one or more switch chips of the set of switch chips and the second set of switch chips.
- Santa Clara CA, US Robert Wilcox - Santa Clara CA, US Richard Hibbs - Santa Clara CA, US Ian Fry - Santa Clara CA, US Arul Ramalingam - Santa Clara CA, US Jim Weaver - Santa Clara CA, US Tiffany Doria - Santa Clara CA, US
International Classification:
H01R 12/71 H01R 13/631 H01R 12/91
Abstract:
A mechanism to mitigate assembly torsion on an electronics assembly is provided. The mechanism including an electronics assembly and a first connector, mounted to the electronics assembly with a lower portion of the first connector proximal to the electronics assembly and an upper portion of the first connector distal to the electronics assembly. The mechanism includes a spring, mounted so as to press the upper portion of the first connector and preload the first connector against assembly force imparted by assembly of the first connector to a second connector. A method to mitigate assembly torsion on an electronics assembly is also provided.
Cisco Systems - San Francisco Bay Area since Mar 2012
Hardware Engineer
Tellabs Inc - Santa Clara US Aug 2010 - Mar 2012
Sr. Engineer
Alcatel-Lucent Feb 2007 - Aug 2010
Hardware Design Engineer / Consultant
Wipro Technologies Feb 2004 - Jul 2010
Project Leader
Changepond Technologies Jun 2000 - Jan 2004
Systems Engineer
Education:
Bharathidasan University 1996 - 2000
BE, Electrical and Electronics
Skills:
Moca Gigabit Ethernet Spi Ddr Ddr2 Ddr3 Fttx Pcb Design Fpga Cpld Xilinx Altera Actel Intel Network Processors Sata Pcie I2C Ipmi Atca Signal Integrity Xaui Serdes Dsl Dslam Freescale Processors Ds3 E3 R/S/G/Mii Gpon Ethernet Hardware Telecommunications X86 Verilog Vhdl Soc Hardware Design Microprocessors Usb System Design Testing Spectrum Analyzer Digital Design Hardware Architecture Integrated Circuit Design Embedded Systems Embedded Software Firmware
Cisco Systems - San Francisco Bay Area since Mar 2012
Hardware Engineer
Tellabs Inc - Santa Clara US Aug 2010 - Mar 2012
Sr. Engineer
Alcatel-Lucent Feb 2007 - Aug 2010
Hardware Design Engineer / Consultant
Wipro Technologies Feb 2004 - Jul 2010
Project Leader
Changepond Technologies Jun 2000 - Jan 2004
Systems Engineer
Education:
Bharathidasan University 1996 - 2000
BE, Electrical and Electronics
Skills:
MoCA Gigabit Ethernet SPI DDR DDR2 DDR3 FTTx PCB design FPGA CPLD Xilinx Altera Actel Intel Network Processors SATA PCIe I2C IPMI ATCA Signal Integrity XAUI SERDES DSL DSLAM Freescale Processors DS3 E3 R/S/G/MII GPON Ethernet Hardware Telecommunications X86 Verilog VHDL SoC Hardware Design Microprocessors USB System Design Testing Spectrum Analyzer Digital Design Hardware Architecture Integrated Circuit Design Embedded Systems Embedded Software Firmware