John A Doucette

Author:

John Doucette

ISBN #:

0890115397

US Patent:

7505456, Mar 17, 2009

Filed:

May 5, 2003

Appl. No.:

10/430200

Inventors:

Daniel W. English - Salem NH, US
John Doucette - Londonderry NH, US
Paul Miller - Derry NH, US
Hicham Saab - Derry NH, US

Assignee:

Cedar Point Communications, Inc. - Derry NH

International Classification:

H04L 12/66
H04L 12/56

US Classification:

370356, 3703951

Abstract:

The invention includes, among other things, a system for passing TDM traffic through a packet switch. In one embodiment, the system includes a packet switch that has a plurality of data ports and is capable of routing FSDU packets between the plurality of data ports. A TDM encapsulation circuit process a TDM data flow that is incoming to the switch. A circuit demultiplexer processes the incoming data flow to buffer data associated with different TDM circuits into different buffer locations. A timer monitors the amount of time available to fill the FSDU, and when the time period reaches the frame boundary, an FSDU generator generates an FSDU that is filled with data associated with the TDM circuits. Header information is added for allowing the packet switch to route the generated FSDU to a port associated with the respective TDM circuit.

US Patent:

20100008357, Jan 14, 2010

Filed:

Feb 6, 2009

Appl. No.:

12/367253

Inventors:

Daniel W. English - Salem NH, US
John Doucette - Londonderry NH, US
Paul Miller - Derry NH, US
Hicham Saab - Derry NH, US

Assignee:

Cedar Point Communications, Inc. - Derry NH

International Classification:

H04L 12/66
H04L 12/56

US Classification:

370356, 370389

Abstract:

The invention includes, among other things, a system for passing TDM traffic through a packet switch. In one embodiment, the system includes a packet switch that has a plurality of data ports and is capable of routing FSDU packets between the plurality of data ports. A TDM encapsulation circuit process a TDM data flow that is incoming to the switch. A circuit demultiplexer processes the incoming data flow to buffer data associated with different TDM circuits into different buffer locations. A timer monitors the amount of time available to fill the FSDU, and when the time period reaches the frame boundary, an FSDU generator generates an FSDU that is filled with data associated with the TDM circuits. Header information is added for allowing the packet switch to route the generated FSDU to a port associated with the respective TDM circuit.