Yunseo Park from San Diego, CA

Resumes

Engineer

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Location:

San Diego, CA

Industry:

Semiconductors

Work:

q
engineer

Education:

Georgia Institute of Technology 2001 - 2005
Doctorates, Doctor of Philosophy, Computer Engineering Georgia Institute of Technology 1999 - 2000
Master of Science, Masters, Computer Engineering Yonsei University 1992 - 1999
Bachelors, Bachelor of Science, Electronics Engineering

Skills:

Analog Circuit Design
Rf Circuits
Cadence
Agilent Ads
Cmos
Power Amplifiers
Lna
Vco

Yunseo Park

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Education:

College 2013 - 2016

Us Patents

Systems And Methods For Cmos Power Amplifiers With Power Mode Control
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US Patent:

8269561, Sep 18, 2012
Filed:

May 10, 2011
Appl. No.:

13/104898
Inventors:

Yunseo Park - Norcross GA, US
Chang-Ho Lee - Marietta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

H03F 3/04
US Classification:

330301, 330124 R
Abstract:

Embodiments of the invention may provide CMOS power amplifiers with power mode control to provide the desired power-added efficiency (PAE), idle current, output power, and Adjacent Channel Leakage Ratio (ACLR). For instance, there may be a multi-mode WCDMA CMOS RF power amplifier having high/medium/low output power modes aimed to achieve high PAE and low idle current in a portable wireless environment. According to an example embodiment, a CMOS RF power amplifier may provide a plurality of separate signal paths for purposes of supporting multi-power modes. For example, there may be a first signal path which supports a high-power mode, and a second path which is subsequently divided into two recursive signal paths or sub-paths to support respective medium and low-power modes. One of the three power modes may be selected or controlled using bias control switches in the first and second paths.

Systems And Methods For A Continuous, Linear, 360-Degree Analog Phase Shifter
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US Patent:

8446200, May 21, 2013
Filed:

May 10, 2011
Appl. No.:

13/104777
Inventors:

Yunseo Park - Norcross GA, US
Jaejoon Kim - Seoul, KR
Chang-Ho Lee - Marietta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

H03K 3/00
H03K 5/13
H03H 11/16
US Classification:

327236, 327108, 327109, 327110, 327231, 4551804, 455337
Abstract:

Embodiments of the invention may be directed to a continuous analog phase shifter for radio frequency (RF) signals, which can be integrated on a CMOS process or another compatible process where inherent process-dependent passive components such as inductors and capacitors may have low quality factors. Insertion loss degradation for a given amount of phase shift may be compensated by using an active compensation circuit/device that smartly controls negative resistance generated from the compensation circuit/device to cancel out finite resistance of a network, leading to very small insertion loss variation. According to an example aspect of the invention, improved phase linearity and increased phase shift for a given size may be obtained by incorporating the compensation circuit/device. Thus, example analog phase shifters in accordance with example embodiments of the invention may have one or more of low insertion loss variation, small size, and good phase linearity over more than a 360 degree phase shift.

Systems And Methods For Minimizing Phase Deviation And/Or Amplitude Modulation (Am)-To-Phase Modulation (Pm) Conversion For Dynamic Range, Radio Frequency (Rf) Non-Linear Amplifiers
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US Patent:

8466738, Jun 18, 2013
Filed:

May 10, 2011
Appl. No.:

13/104838
Inventors:

Yunseo Park - Norcross GA, US
Jaejoon Kim - Seoul, KR
Chang-Ho Lee - Marietta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

G06G 7/26
US Classification:

327560, 327403
Abstract:

Embodiments of the invention may provide systems and methods for minimizing phase deviation and/or amplitude modulation (AM)-to-phase modulation (PM) conversion for dynamic range, radio frequency (RF) non-linear amplifiers. In order to provide high dynamic range with reduced phase error, embodiments of the invention may utilize two separate paths for processing a signal. In particular, an input signal may be sampled and divided into each path. The first signal path may be used to shape a signal, and in particular, a voltage waveform at the load. The second signal path may be used for generating negative capacitances corresponding to the voltage waveform at the load. By combining the two signals at the load, a high-dynamic range, high-frequency, non-linear amplifier can be achieved that reduces phase error resulting from amplitude fluctuations with a relatively low unity-gain frequency (f) process.

Analog-To-Digital Converter With A Resolution Booster
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US Patent:

8471748, Jun 25, 2013
Filed:

May 10, 2011
Appl. No.:

13/104810
Inventors:

Yunseo Park - Norcross GA, US
Jaejoon Kim - Seoul, KR
Chang-Ho Lee - Marietta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

H03M 1/14
US Classification:

341155, 341163, 341156
Abstract:

An analog-to-digital converter with a resolution booster is provided. The analog-to-digital converter may include a successive approximation analog-to-digital converter, a resolution booster, and an output combiner. The successive approximation analog-to-digital converter may be configured to convert an analog signal into digital data. The resolution booster may be selectively activated to enhance the resolution of the successive approximation analog-to-digital converter, and the output combiner may be configured to combine the respective outputs of the successive approximation analog-to-digital converter and the resolution booster.

Systems, Methods, And Apparatuses For Reducing Interference At The Front-End Of A Communications Receiving Device
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US Patent:

8521090, Aug 27, 2013
Filed:

Mar 25, 2010
Appl. No.:

12/731840
Inventors:

Andrew Joo Kim - Atlanta GA, US
Yunseo Park - Atlanta GA, US
Seongmo Yim - Marietta GA, US
Youngsik Hur - Atlanta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

H04B 1/00
H04B 1/44
US Classification:

455 631, 455 6713, 455 83, 455296, 455307
Abstract:

Embodiments of the invention may provide for reducing interference in the front-end of a communications receiver. The cancellation circuitry may be utilized in conjunction with a preliminary rejection filter for improved rejection of out-of-band interference from other radio services or circuitry. The cancellation circuit may be placed in parallel with the preliminary rejection filter and may enhance suppression at the interference frequency by matching the gain and phase of the preliminary rejection filter prior to subtracting the matched signal from the preliminary rejection filter output. The cancellation circuit need not necessary know beforehand the characteristics of the preliminary rejection filter, the interference source, or the coupling mechanism, as it may adapt to unknown or varying interferers by adapting the matching gain and phase values based on the output of the preliminary rejection filter at tap points occurring both before and after application of the cancellation signal.

Systems, Methods, And Apparatuses For Reducing Interference At The Front-End Of A Communications Receiving Device
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US Patent:

8565681, Oct 22, 2013
Filed:

Mar 25, 2010
Appl. No.:

12/731859
Inventors:

Andrew Joo Kim - Atlanta GA, US
Yunseo Park - Atlanta GA, US
Seongmo Yim - Marietta GA, US
Youngsik Hur - Atlanta GA, US
Assignee:

Samsung Electro-Mechanics - Gyunngi-Do
International Classification:

H04B 1/00
H04B 1/44
US Classification:

455 631, 455 6713, 455 83, 455296, 455307
Abstract:

Embodiments of the invention may provide for reducing interference in the front-end of a communications receiver. The cancellation circuitry may be utilized in conjunction with a preliminary rejection filter for improved rejection of out-of-band interference from other radio services or circuitry. The cancellation circuit may be placed in parallel with the preliminary rejection filter and may enhance suppression at the interference frequency by matching the gain and phase of the preliminary rejection filter prior to subtracting the matched signal from the preliminary rejection filter output. The cancellation circuit need not necessary know beforehand the characteristics of the preliminary rejection filter, the interference source, or the coupling mechanism, as it may adapt to unknown or varying interferers by adapting the matching gain and phase values based on the output of the preliminary rejection filter at tap points occurring both before and after application of the cancellation signal.

Systems And Methods For Wideband Cmos Voltage-Controlled Oscillators Using Reconfigurable Inductor Arrays
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US Patent:

20120286889, Nov 15, 2012
Filed:

May 10, 2011
Appl. No.:

13/104807
Inventors:

Yunseo Park - Norcross GA, US
Jaejoon Kim - Seoul, KR
Chang-Ho Lee - Marietta GA, US
Assignee:

SAMSUNG ELECTRO-MECHANICS COMPANY - Gyunggi-Do
International Classification:

H03B 5/12
US Classification:

331117FE
Abstract:

As wireless communication technology evolves, various transceivers become integrated into a single system, which implements a seamless connection to search available frequency bands and to provide wireless connections regardless of their wireless standards. One of the key technologies for seamless implementation is an ultra-wideband local oscillator, which can overcome the restriction of limited tuning range in typical RF local oscillators. Many RF oscillators incorporate LC-tuned oscillators because of their good noise performance while their tuning range is limited by fixed inductance and varied capacitance. The planar inductor fabricated on the CMOS process occupies a large area as well. By replacing the planar inductor with the array of bondwires, and including switches to provide proper impedance for the circuit to generate negative impedance, the tuning range of a CMOS voltage-controlled oscillator (VCO) is extended more than 100%, which number can not be achieved in a convention VCO.

Low Power Mode Amplification With A Transformer Output Matching And A Virtual Ground
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US Patent:

7944296, May 17, 2011
Filed:

Mar 12, 2010
Appl. No.:

12/722990
Inventors:

Chang-Ho Lee - Marietta GA, US
Kyu Hwan An - Irvine CA, US
Yunseo Park - Norcross GA, US
Assignee:

Samsung Electro-Mechanics Company
International Classification:

H03F 1/00
US Classification:

330195, 330154
Abstract:

A power amplifier system in accordance with an example embodiment can utilize a transformer having a primary winding inductively coupled to a secondary winding, where the primary winding includes a center tap between a first port and a second port, where the secondary winding includes a third port and a fourth port, where the primary winding receives a first output from a first amplifier, where the center tap receives a second output from a second amplifier. The system can also include a first capacitor connected to the center tap and the first port; a second capacitor connected to the center tap and the second port; a first switch in electrical connection with the center tap, where the first switch can connect the center tap to a ground port; a second switch connected to the fourth port, where the second switch can connect the fourth port to a common node in electrical connection with the center tap; and a third capacitor connected between the common node and an output node connected to the third port from a system output can be obtained.