Thomas W Love

Author:

Thomas F. Love

ISBN #:

0813376254

Author:

Thomas A. Love

ISBN #:

0867184019

Author:

Thomas A. Love

ISBN #:

0867184248

US Patent:

8067829, Nov 29, 2011

Filed:

Apr 29, 2009

Appl. No.:

12/432672

Inventors:

John A. Hughes - Falls Church VA, US
Thomas E. Love - Gainesville VA, US
Eugene Lemoine - Manassas VA, US
David H. Lee - Arlington VA, US
Christopher Ebel - Manassas VA, US

Assignee:

BAE Systems Information and Electronic Systems Integration Inc. - Nashua NH

International Classification:

H01L 23/02

US Classification:

257686, 257777, 257E25006, 257E25013

Abstract:

A system and method are provided in which a first chip in a stacked multi-chip module configuration is affixed via one or more adhesion layers to a first portion of a partitioned interposer unit. Planar partitions of the interposer are physically bonded via multiple solder “bumps,” which possess high tensile strength but low resistance to horizontal shear force or torque. A second chip is affixed via one or more adhesion layers to the second portion of the partitioned interposer. The chips may thus be separated by horizontally and oppositely shearing or twisting the first and second portions of the partitioned interposer away from one another.

US Patent:

8338230, Dec 25, 2012

Filed:

Sep 27, 2011

Appl. No.:

13/245909

Inventors:

John A. Hughes - Falls Church VA, US
Thomas E. Love - Gainesville VA, US
Eugene Lemoine - Manassas VA, US
David H. Lee - Arlington VA, US
Christopher Ebel - Manassas VA, US

Assignee:

BAE Systems Information and Electronic Systems Integration Inc. - Nashua NH

International Classification:

H01L 21/44
H01L 21/48
H01L 21/50

US Classification:

438106, 438109, 257E21499

Abstract:

A system and method are provided in which a first chip in a stacked multi-chip module configuration is affixed via one or more adhesion layers to a first portion of a partitioned interposer unit. Planar partitions of the interposer are physically bonded via multiple solder “bumps,” which possess high tensile strength but low resistance to horizontal shear force or torque. A second chip is affixed via one or more adhesion layers to the second portion of the partitioned interposer. The chips may thus be separated by horizontally and oppositely shearing or twisting the first and second portions of the partitioned interposer away from one another.

US Patent:

20140175675, Jun 26, 2014

Filed:

Feb 27, 2014

Appl. No.:

14/191592

Inventors:

- Nashua NH, US
John A. Hughes - Falls Church VA, US
Thomas E. Love - Gainesville VA, US
Sheila J. Konecke - Leesburg VA, US
Jeffrey Montag - Brandy Station VA, US
Peter M. Wallace - Newfields NH, US

Assignee:

BAE Systems Information and Electronic Systems Integration Inc. - Nashua NH

International Classification:

H01L 25/065

US Classification:

257777

Abstract:

A method for manufacturing an electronic multi-chip module that involves stacking at least six tested devices to form the module. These devices may be individually tested prior to assembling the electronic module. After individually testing the devices, the devices may be stacked one on top of the other to form an electronic multi-chip module having at least six stacked devices. Other embodiments may be described and claimed.