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Szehim H Ng

from Campbell, CA

Also known as:
  • Daniel Z Ng
Phone and address:
3887 Via Montalvo, Campbell, CA 95008
408 374-4913

Szehim Ng Phones & Addresses

  • 3887 Via Montalvo, Campbell, CA 95008 • 408 374-4913
  • Sunnyvale, CA

Us Patents

  • Method Of Fabricating A High Power Rf Field Effect Transistor With Reduced Hot Electron Injection And Resulting Structure

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  • US Patent:
    6506648, Jan 14, 2003
  • Filed:
    Sep 2, 1998
  • Appl. No.:
    09/145818
  • Inventors:
    Francois Hebert - San Mateo CA
    Szehim Daniel Ng - Campbell CA
  • Assignee:
    Cree Microwave, Inc. - Sunnyvale CA
  • International Classification:
    H01L 21336
  • US Classification:
    438286, 438289, 438290, 438291, 438305, 438306, 257262, 257288
  • Abstract:
    Methods of fabricating a high power RF lateral diffused MOS transistor (LDMOS) having increased reliability includes fabricating an N-drift region for the drain prior to fabrication of the gate contact and other process steps in fabricating the transistor. The resulting device has reduced adverse affects from hot carrier injection including reduced threshold voltage shift over time and reduced maximum current reduction over time. Linearity of device is maximized along with increased reliability while channel length is reduced.
  • Mosfet Device Having Recessed Gate-Drain Shield And Method

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  • US Patent:
    60017104, Dec 14, 1999
  • Filed:
    Mar 30, 1998
  • Appl. No.:
    9/050859
  • Inventors:
    Hebert Francois - San Mateo CA
    Szehim Ng - Campbell CA
  • Assignee:
    Spectrian, Inc. - Sunnyvale CA
  • International Classification:
    H01L 2176
    H01L 21336
    H01L 21338
    H01L 2976
  • US Classification:
    438454
  • Abstract:
    A method of fabricating a MOSFET transistor and resulting structure having a drain-gate feedback capacitance shield formed in a recess between a gate electrode and the drain region. The shield does not overlap the gate and thereby minimizes effect on the input capacitance of the transistor. The process does not require complex or costly processing since one additional non-critical mask is required with selective etch used to create the recess.
  • Mosfet Device Having Recessed Gate-Drain Shield And Method

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  • US Patent:
    60911107, Jul 18, 2000
  • Filed:
    Oct 29, 1999
  • Appl. No.:
    9/430530
  • Inventors:
    Francois Hebert - San Mateo CA
    Szehim Ng - Campbell CA
  • Assignee:
    Spectrian Corporation - Sunnyvale CA
  • International Classification:
    H01L 2978
  • US Classification:
    257340
  • Abstract:
    A method of fabricating a MOSFET transistor and resulting structure having a drain-gate feedback capacitance shield formed in a recess between a gate electrode and the drain region. The shield does not overlap the gate and thereby minimizes effect on the input capacitance of the transistor. The process does not require complex or costly processing since one additional non-critical mask is required with selective etch used to create the recess.
  • Self-Aligned Shield Structure For Realizing High Frequency Power Mosfet Devices With Improved Reliability

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  • US Patent:
    62222295, Apr 24, 2001
  • Filed:
    Jun 14, 1999
  • Appl. No.:
    9/333123
  • Inventors:
    Francois Hebert - San Mateo CA
    Szehim Ng - Campbell CA
  • Assignee:
    CREE, Inc. - Durham NC
  • International Classification:
    H01L 2976
  • US Classification:
    257327
  • Abstract:
    A high frequency power field effect transistor has a self-aligned gate-drain shield adjacent to the gate and overlying the drain. Fabrication of the structure does not require complex or costly processing and the resulting self-aligned shield structure minimizes increase to input and output capacitances. Hot carrier injection and related shifts are reduced thereby improving reliability of the transistor.

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