Suresh S Subramaniam

age ~61

from Little Rock, AR

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Also known as:

Suresh Subramaniam Iyer
Suresh Subramamia

Phone and address:: 6 Cherryhill Cv, Little Rock, AR 72211

Connected to:

Suresh Subramaniam Phones & Addresses

6 Cherryhill Cv, Little Rock, AR 72211
3012 Holford Rd, Richardson, TX 75082 • 972 705-9142 • 972 889-0627 • 972 964-3013
2429 Stone Creek Dr, Plano, TX 75075 • 972 964-3013
Mount Pleasant, SC
Notre Dame, IN
6 Cherryhill Cv, Little Rock, AR 72211 • 214 375-0501

Work

Position:

Production Occupations

Education

Degree:

High school graduate or higher

Us Patents

Method For Test Data-Driven Statistical Detection Of Outlier Semiconductor Devices
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US Patent:

7129735, Oct 31, 2006
Filed:

Sep 10, 2004
Appl. No.:

10/938488
Inventors:

Suresh Subramaniam - Richardson TX, US
Kenneth M. Butler - Richardson TX, US
John M. Carulli - Richardson TX, US
Richard A. Lawrence - Wylie TX, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

G01R 31/26
US Classification:

324765
Abstract:

A method for test data-driven detection of outlier semiconductor devices. Some illustrative embodiments may be a method used to test a semiconductor die comprising performing a burn-in test of a plurality of sample semiconductor dies to identify a failure of a defective semiconductor die, correlating variations in a parameter with the failure (the parameter comprising a characteristic associated with the plurality of sample semiconductor dies), defining a parameter constraint associated with the parameter, performing a production test of a production semiconductor die, and identifying the production semiconductor die as an outlier semiconductor die (the outlier semiconductor die passing the production test, but failing to conform to the parameter constraint).

Identification Of Outlier Semiconductor Devices Using Data-Driven Statistical Characterization
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US Patent:

7494829, Feb 24, 2009
Filed:

Sep 28, 2007
Appl. No.:

11/864283
Inventors:

Suresh Subramaniam - Richardson TX, US
Amit Vijay Nahar - Dallas TX, US
Thomas John Anderson - Dallas TX, US
Kenneth Michael Butler - Richardson TX, US
John Michael Carulli - Richardson TX, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

G01R 31/26
G06F 17/18
US Classification:

438 14, 438 17, 702179, 324765
Abstract:

Systems and methods for identification of outlier semiconductor devices using data-driven statistical characterization are described herein. At least some preferred embodiments include a method that includes identifying a plurality of sample semiconductor chips that fail a production test as a result of subjecting the plurality of sample semiconductor chips to a stress inducing process, identifying at least one correlation between variations in a first sample parameter and variations in a second sample parameter (the sample parameters associated with the plurality of sample semiconductor chips) identifying as a statistical outlier chip any of a plurality of production semiconductor chips that pass the production test and that further do not conform to a parameter constraint generated based upon the at least one correlation identified and upon data associated with at least some of the plurality of production semiconductor chips, and segregating the statistical outlier chip from the plurality of production semiconductor chip.

Semiconductor Outlier Identification Using Serially-Combined Data Transform Processing Methodologies
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US Patent:

8126681, Feb 28, 2012
Filed:

Sep 24, 2009
Appl. No.:

12/566387
Inventors:

Amit V Nahar - Dallas TX, US
John M Carulli - Richardson TX, US
Kenneth M Butler - Richardson TX, US
Thomas J Anderson - Dallas TX, US
Suresh Subramaniam - Richardson TX, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

G06F 19/00
US Classification:

702190
Abstract:

A method for identifying outlier semiconductor devices from a plurality of semiconductor devices includes performing at least one electrical test to obtain electrical test data including at least one test parameter, applying at least a first data transform processing methodology to the electrical test data to generate processed test data, and applying a second data transform processing methodology that is different from the first data transform processing methodology to process the processed test data. The second data transform processing methodology applies an outlier test limit to identify non-outlier devices that comprise semiconductor devices from the semiconductor devices that conform to the outlier test limit and outlier devices that do not conform to the outlier test limit. The semiconductor devices are dispositioned using the outlier identification results. At least one of the data transform processing methodologies can include statistics.