Steven J Mass

US Patent:

20070235744, Oct 11, 2007

Filed:

Mar 28, 2006

Appl. No.:

11/390772

Inventors:

Dean Tran - Westminster CA, US
Alan Hirschberg - Thousand Oak CA, US
Ha DeMarco - Redondo Beach CA, US
Luis Rochin - Temecula CA, US
Thomas Chung - Redondo Beach CA, US
Mark Kintis - Manhattan Beach CA, US
Steven Mass - La Palma CA, US

International Classification:

H01L 33/00

US Classification:

257094000

Abstract:

Ultra-high speed semiconductors that are usually very thin and therefore very fragile still require connection to a circuit board and a heat transfer pathway. Ultra-high speed circuits and semiconductor devices are provided with a carrier plate formed on the backside of a wafer or substrate by a variety of deposition methods. The carrier plate is a series of metal layers, each being selected to enable the attachment of a relatively thick copper carrier plate to the backside of the substrate or wafer.

US Patent:

20120152454, Jun 21, 2012

Filed:

Dec 9, 2011

Appl. No.:

13/315590

Inventors:

Steven J. Mass - La Palma CA, US
Anthony L. Long - Redondo Beach CA, US
Mansoor K. Siddiqui - Torrance CA, US
Marijan D. Grgas - Rancho Palos Verdes CA, US
Gershon Akerling - Culver City CA, US

International Classification:

G02B 6/10
B22D 19/00
B32B 38/08
B29C 70/00
H01L 23/06
H05K 7/20

US Classification:

156280, 174565, 174547, 361714, 264259, 164 98

Abstract:

An electrical structure having a foam housing is set forth. The foam housing includes an interior surface forming a conductive cavity adapted to carry energized waveforms therethrough. An electrical component of the electrical structure is integrally formed with the interior surface as the foam housing of the structure is assembled.

US Patent:

20210368622, Nov 25, 2021

Filed:

Aug 9, 2021

Appl. No.:

17/397314

Inventors:

- Falls Church VA, US
Steven J. Mass - La Palma CA, US
Andrew Yurko - Redondo Beach CA, US

International Classification:

H05K 1/14
H05K 3/36
H05K 3/40
B33Y 80/00

Abstract:

An elongate, three dimensional, conductive, micro lattice truss structure has parallel layers of resilient strands so that the truss structure maintains structural integrity during end-to-end compression which shortens its uncompressed length. The resiliency of the micro lattice truss structure enables the truss structure to return to substantially its uncompressed length when the compression is removed. The truss structure is adapted to provide a resilient electrical connection between two opposing conductive areas on parallel spaced-apart printed circuit boards when the distal ends of the truss structure engage and are compressed between the two areas.

US Patent:

20180376595, Dec 27, 2018

Filed:

Aug 31, 2018

Appl. No.:

16/118892

Inventors:

- Falls Church VA, US
Steven J. Mass - La Palma CA, US
Andrew Yurko - Redondo Beach CA, US

International Classification:

H05K 1/14
H05K 3/40
H05K 3/36

Abstract:

In an exemplary method, three dimensional printing forms a micro lattice truss structure with a first end formed in contact with a conductive area on a PCB so that the truss structure is adhered to the conductive area due to the three dimensional printing. The truss structure extends outward from the PCB and has a distal end. The truss structure is formed with resiliency so that the truss structure maintains structural integrity during end-to-end compression. The resiliency of the micro lattice truss structure enables the truss structure to return to substantially its uncompressed length when the compression is removed. The truss structure is conductive so that a resilient electrical connection can be formed between the conductive area of the PCB and another spaced apart surface parallel with the PCB when the distal end of the truss structure is in contact with and compressed by the other surface.

US Patent:

20180116052, Apr 26, 2018

Filed:

Oct 20, 2016

Appl. No.:

15/298313

Inventors:

- Falls Church VA, US
Steven J. Mass - La Palma CA, US

International Classification:

H05K 1/14
H05K 1/02
H05K 1/03
H01P 3/08
H01L 25/18
H01L 23/66
H01L 23/498
H01L 23/373

Abstract:

An apparatus includes: electronic tile packaging, the electronic tile packaging comprising: a plurality of tile layers, at least one of the tile layers comprising a crystalline structure having high thermal conductivity.

US Patent:

20170215286, Jul 27, 2017

Filed:

Jan 27, 2016

Appl. No.:

15/007743

Inventors:

- Falls Church VA, US
Steven J. Mass - La Palma CA, US
Andrew Yurko - Redondo Beach CA, US

International Classification:

H05K 1/14
H05K 3/02
H05K 3/36

Abstract:

In an exemplary method, three dimensional printing forms a micro lattice truss structure with a first end formed in contact with a conductive area on a PCB so that the truss structure is adhered to the conductive area due to the three dimensional printing. The truss structure extends outward from the PCB and has a distal end. The truss structure is formed with resiliency so that the truss structure maintains structural integrity during end-to-end compression. The resiliency of the micro lattice truss structure enables the truss structure to return to substantially its uncompressed length when the compression is removed. The truss structure is conductive so that a resilient electrical connection can be formed between the conductive area of the PCB and another spaced apart surface parallel with the PCB when the distal end of the truss structure is in contact with and compressed by the other surface.

US Patent:

20160211585, Jul 21, 2016

Filed:

Jan 15, 2015

Appl. No.:

14/597785

Inventors:

- Falls Church VA, US
Sudhakar K. Rao - Rancho Palos Verdes CA, US
Steven J. Mass - La Palma CA, US
Dana Quincey - Cerritos CA, US

International Classification:

H01Q 21/24
H01Q 9/28

Abstract:

An exemplary antenna array has first self-complementary antenna cells, e.g. bowtie antennas, disposed in a first plane in rows and columns. Additional bowtie antenna cells are disposed in a second plane parallel to the first plane and are aligned in corresponding rows and columns. A first stripline disposed between the first and second planes carries RF signals to/from the first and second bowtie antenna cells. A slot feed couples the RF signals between the first stripline and each of the first and second bowtie antenna cells. A conductive layer in a third plane parallel to the first and second planes serves as a ground plane for signals radiated from/to the first and second bowtie antenna cells.