An adaptive gain and offset control for a digital video analog to digital converter is provided. A gain indicator and/or an offset indicator, which are used as inputs control signals to an analog-to-digital converter, are determined based on a detected maximum level and a detected blanking level from an input video signal. The gain and offset indicators may be determined independently from a minimum level of the video signal.
Digital Timing Extraction And Recovery In A Digital Video Decoder
Sheng De Jang - Cupertino CA, US Qi Jiang - Shanghai, CN Hsui Min Wong - Shanghai, CN
Assignee:
Huaya Microelectronics - Shanghai
International Classification:
H04N 7/12
US Classification:
37524027, 37524028, 348503
Abstract:
In one example, a digital video resampler and decoder is disclosed. An input buffer is coupled to a source of a video signal oversampled by at least two times. A horizontal synchronization detector is coupled to the input buffer, and detects horizontal synchronization boundaries. A counter is coupled to the horizontal synchronization detector to count a number of samples between horizontal synchronization boundaries. A comparator is coupled to the counter and compares the counted number of samples to a reference count. A sample corrector is coupled to the input buffer and modifies a block of samples based on a result from the comparator. An output buffer is coupled to the sample corrector to hold the modified block of samples. A comb filter is coupled to the output buffer, and generates first and second three-dimensional color values based on the modified block of samples.
Multi-Directional Comb Filtering In A Digital Video Decoder
Sheng De Jang - Cupertino CA, US Hsiu Min Wong - Shanghai, CN Peng Xiao - Shanghai, CN
Assignee:
HUAYA MICROELECTRONICS, INC. - San Jose CA
International Classification:
H04N 9/66
US Classification:
348639, 348E09046
Abstract:
A digital video decoder architecture is provided wherein chrominance values are determined first, then luminance values are determined, in part, based on the previously determined chrominance values. In this architecture, luminance separation occurs after and based on