Ronald D Schofield

US Patent:

52413888, Aug 31, 1993

Filed:

Sep 8, 1992

Appl. No.:

7/941817

Inventors:

Ronald D. Schofield - Ridgecrest CA
William J. Fretz - Ridgecrest CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

H04N 521

US Classification:

358167

Abstract:

A video signal filtering circuit and method includes the operative steps of eceiving unfiltered high-state and low-state components of a video signal being substantially equally injected with electromagnetic noise, subtracting the unfiltered high-state and low-state components of the video signal one from the other so as to thereby produce a first signal having a DC offset component and an AC data-containing component free of noise, removing the DC offset component from the first signal and passing the noise-free AC data-containing component, clamping the first signal to a preset DC reference level corresponding to a specified sync level of a standard video signal so as to thereby produce a second signal having the AC data-containing component free of noise and being clamped to the preset DC reference level, and isolating the second signal from external electronic disturbances so as to produce a noise-free AC data-containing reference level-clamped output signal for providing a filtered high-state component having syncs stabilized to the specified sync level of the standard video signal to replace the original unfiltered noise-injected high-state component of the video signal.

US Patent:

55879721, Dec 24, 1996

Filed:

Mar 4, 1996

Appl. No.:

8/610502

Inventors:

Ronald D. Schofield - Ridgecrest CA

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G04F 800
G06F 104

US Classification:

368118

Abstract:

A control signal generator for generating a plurality of control and timing ignals which are supplied to a scan converter. The control and timing signals are utilized by the logic elements of the scan converter to process the incoming pixel data from a missile's seeker allowing the data to be supplied to a video monitor for viewing. The control signal generator includes a state machine which generates four state variable signals and a cycle counter which generates a binary count thirty one signal which allows the state machine to cycle through six predetermined states until the scan converter completes processing of incoming pixel data from each detector of the missile's seeker. The count thirty one signal and the four state variable signals are decoded by five decoders which generate the timing and control signals for the logic elements of the scan converter. Some of the timing and control signals are delayed by five and fifteen nanosecond delay lines prior to being supplied to the logic elements of the scan converter.