Ren D Earl

US Patent:

6522577, Feb 18, 2003

Filed:

Jun 5, 2002

Appl. No.:

10/163476

Inventors:

Ren D. Earl - Meridian ID
Jeffrey A. McKee - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 1100

US Classification:

365158, 365171, 365173

Abstract:

The system and method disclosed employ one or more switchable, close proximity electromagnets as part of the MRAM device circuit package to apply external magnetic fields to the magnetic elements and conductive lines of the MRAM array. A magnetic field generated by an electromagnet spanning all or part of an MRAM array could be used to selectively erase the MRAM array in whole or in part, respectively. In addition, the magnetic fields could be generated to support the magnetic fields sought to be induced by application of current to the row and column lines of the MRAM array, allowing for the writing of data to magnetic elements in the MRAM array using less power. In addition, diagonally disposed electromagnets could be used to generate these magnetic fields, and could also be used to demagnetize the row and column lines of the MRAM array.

US Patent:

6650564, Nov 18, 2003

Filed:

Jan 13, 2003

Appl. No.:

10/341768

Inventors:

Ren D. Earl - Meridian ID
Jeffrey A. McKee - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 1100

US Classification:

365158, 365171, 365173

Abstract:

The system and method disclosed employ one or more switchable, close proximity electromagnets as part of the MRAM device circuit package to apply external magnetic fields to the magnetic elements and conductive lines of the MRAM array. A magnetic field generated by an electromagnet spanning all or part of an MRAM array could be used to selectively erase the MRAM array in whole or in part, respectively. In addition, the magnetic fields could be generated to support the magnetic fields sought to be induced by application of current to the row and column lines of the MRAM array, allowing for the writing of data to magnetic elements in the MRAM array using less power. In additional, diagonally disposed electromagnets could be used to generate these magnetic fields, and could also be used to demagnetize the row and column lines of the MRAM array.

US Patent:

6653154, Nov 25, 2003

Filed:

Mar 15, 2001

Appl. No.:

09/805916

Inventors:

Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Gurtej Sandhu - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2100

US Classification:

438 3

Abstract:

This invention pertains to a method of fabricating an MRAM structure. The method includes forming a pinned layer within a protective region defined by sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.

US Patent:

6682943, Jan 27, 2004

Filed:

Apr 27, 2001

Appl. No.:

09/842783

Inventors:

D. Mark Durcan - Boise ID
Gurtej Sandhu - Boise ID
Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01G 706

US Classification:

438 3, 438240

Abstract:

A method of forming minimally spaced MRAM structures is disclosed. A photolithography technique is employed to define masking patterns, on the sidewalls of which spacers are subsequently formed to reduce the distance between any of the two adjacent masking patterns. A filler material is next used to fill in the space around the masking patterns and to form filler plugs. The masking patterns and the spacers are removed using the filler plugs as a hard mask. Digit and word lines of MRAM structures are subsequently formed.

US Patent:

6689624, Feb 10, 2004

Filed:

Apr 8, 2003

Appl. No.:

10/408450

Inventors:

Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Gurtej Sandhu - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 2100

US Classification:

438 3

Abstract:

This invention pertains to a method of fabricating a trenchless MRAM structure and to the resultant MRAM structure. The MRAM structure of the invention has a pinned layer formed within protective sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.

US Patent:

6689661, Feb 10, 2004

Filed:

Apr 10, 2001

Appl. No.:

09/828823

Inventors:

D. Mark Durcan - Boise ID
Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 21336

US Classification:

438268, 438 3, 438 73, 438244, 438253, 438258, 438320, 438551, 438597, 438601, 438621, 438671, 438706, 438711, 438714

Abstract:

A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

US Patent:

6750069, Jun 15, 2004

Filed:

Jun 5, 2003

Appl. No.:

10/454479

Inventors:

D. Mark Durcan - Boise ID
Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 21336

US Classification:

438 3, 438257, 438258, 438259

Abstract:

A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

US Patent:

6765250, Jul 20, 2004

Filed:

Apr 9, 2003

Appl. No.:

10/409145

Inventors:

Trung T. Doan - Boise ID
Roger Lee - Boise ID
Dennis Keller - Boise ID
Gurtej Sandhu - Boise ID
Ren Earl - Meridian ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 31119

US Classification:

257295, 257421

Abstract:

This invention pertains to a method of fabricating a trenchless MRAM structure and to the resultant MRAM structure. The MRAM structure of the invention has a pinned layer formed within protective sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.