Randy W Raasch

US Patent:

8169296, May 1, 2012

Filed:

Jun 29, 2007

Appl. No.:

11/824284

Inventors:

Gary Carlson - Aliso Viejo CA, US
Jeffrey Norris - Lake Forest CA, US
Randy Raasch - Mission Viejo CA, US
Long Ta - Garden Grove CA, US

Assignee:

EADS North America, Inc. - Irvine CA

International Classification:

G08B 21/00

US Classification:

340 228, 340 21, 340 22, 340 227, 333101, 333105, 361805, 370386, 370388

Abstract:

A switch matrix module () includes programmable stub breakers (--) which can break off the bus and isolate unused portion of the switch matrix. Using three-way stub breakers (--) at the matrix front-ends that can either completely isolate a middle matrix or cut off stubs left or right of the destination and source matrices, allows for the formation of very large matrices which have improved operational performance.

US Patent:

55552099, Sep 10, 1996

Filed:

Aug 2, 1995

Appl. No.:

8/510376

Inventors:

Mark L. Smith - Laguna Beach CA
Randy W. Raasch - Mission Viejo CA

Assignee:

Simple Technology, Inc. - Santa Ana CA

International Classification:

G11C 700

US Classification:

36518905

Abstract:

A circuit for latching data signals emanating from a DRAM memory for an extended period of time. The circuit is implemented on an ASIC chip which is positioned external to an FPM DRAM-type memory device. The circuit is organized to have a system transceiver, a memory transceiver, a data-in bus, a data-out bus, and control logic. The data-in bus is directly connected to a memory processor or controller through the system transceiver and the data-out bus is directly connected to the memory through the memory transceiver. The data-in bus is connected to the memory through a tri-state buffer positioned in the memory transceiver and the tri-state buffer is normally in an on position thereby normally connecting the data-in bus to the memory. The data-out bus is connected to the memory processor through a tri-state buffer which is normally in an off position. Hence, the circuit is normally configured to write data.