Philip J Lehtola from 5000 Hunt Rd, Cedar Rapids, IA 52411, age 43, Phone: 319 431-2650

Us Patents

Power Amplifier Modules Including Related Systems, Devices, And Methods
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US Patent:

20140002188, Jan 2, 2014
Filed:

Jun 13, 2013
Appl. No.:

13/917384
Inventors:

Yifan Guo - Irvine CA, US
Mehran Janani - Oak Park CA, US
Tin Myint Ko - Newbury Park CA, US
Philip John Lehtola - Cedar Rapids IA, US
Anthony James LoBianco - Irvine CA, US
Hardik Bhupendra Modi - Irvine CA, US
Hoang Mong Nguyen - Fountain Valley CA, US
Matthew Thomas Ozalas - Novato CA, US
Sandra Louise Petty-Weeks - Newport Beach CA, US
Matthew Sean Read - Rancho Santa Margarita CA, US
Jens Albrecht Riege - Ojai CA, US
David Steven Ripley - Marion IA, US
Hongxiao Shao - Thousand Oaks CA, US
Hong Shen - Oak Park CA, US
Weimin Sun - Santa Rosa Valley CA, US
Hsiang-Chih Sun - Thousand Oaks CA, US
Patrick Lawrence Welch - Campbell CA, US
Guohao Zhang - Nanjing, CN
Assignee:

SKYWORKS SOLUTIONS, INC. - Woburn MA
International Classification:

H03F 3/19
US Classification:

330250
Abstract:

A power amplifier module includes a power amplifier including a GaAs bipolar transistor having a collector, a base abutting the collector, and an emitter, the collector having a doping concentration of at least about 3×10cmat a junction with the base, the collector also having at least a first grading in which doping concentration increases away from the base; and an RF transmission line driven by the power amplifier, the RF transmission line including a conductive layer and finish plating on the conductive layer, the finish plating including a gold layer, a palladium layer proximate the gold layer, and a diffusion barrier layer proximate the palladium layer, the diffusion barrier layer including nickel and having a thickness that is less than about the skin depth of nickel at 0.9 GHz. Other embodiments of the module are provided along with related methods and components thereof.

Process-Compensated Hbt Power Amplifier Bias Circuits And Methods
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US Patent:

20130344825, Dec 26, 2013
Filed:

Jun 13, 2013
Appl. No.:

13/917552
Inventors:

Philip John Lehtola - Cedar Rapids IA, US
Hongxiao Shao - Thousand Oaks CA, US
Tin Myint Ko - Newbury Park CA, US
Matthew Thomas Ozalas - Novato CA, US
International Classification:

H03F 3/21
H04B 1/38
US Classification:

455 902, 330296
Abstract:

The present disclosure relates to a system for biasing a power amplifier. The system can include a first die that includes a power amplifier circuit and a passive component having an electrical property that depends on one or more conditions of the first die. Further, the system can include a second die including a bias signal generating circuit that is configured to generate a bias signal based at least in part on measurement of the electrical property of the passive component of the first die.

Power Amplifier Modules Including Semiconductor Resistor And Tantalum Nitride Terminated Through Wafer Via
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US Patent:

20220393653, Dec 8, 2022
Filed:

Aug 17, 2022
Appl. No.:

17/820497
Inventors:

- Irvine CA, US
Hongxiao Shao - Thousand Oaks CA, US
Tin Myint Ko - Newbury Park CA, US
Matthew Thomas Ozalas - Novato CA, US
Hong Shen - Palo Alto CA, US
Mehran Janani - Oak Park CA, US
Jens Albrecht Riege - Ojai CA, US
Hsiang-Chih Sun - Thousand Oaks CA, US
David Steven Ripley - Cedar Rapids IA, US
Philip John Lehtola - Cedar Rapids IA, US
International Classification:

H03F 3/213
H03F 3/19
H03F 1/02
H03F 3/21
H03F 3/195
H01L 23/00
H01L 21/768
H03F 3/24
H01L 23/552
H01L 29/36
H01L 29/66
H01L 29/737
H01L 29/812
H01L 29/08
H01L 29/205
H01L 21/8252
H01L 27/06
H01L 23/498
H01L 23/50
H03F 3/60
H01L 23/66
H01L 29/20
H01L 23/48
H01L 21/48
H01L 21/56
H01L 21/78
H01L 21/8249
H01L 21/66
H01L 23/31
H01L 23/522
Abstract:

One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

Apparatus And Methods For Power Amplifier Signal Limiting
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US Patent:

20220385328, Dec 1, 2022
Filed:

May 12, 2022
Appl. No.:

17/663067
Inventors:

- Irvine CA, US
Philip John Lehtola - Cedar Rapids IA, US
International Classification:

H04B 1/40
H03F 3/24
H03F 1/52
Abstract:

Apparatus and methods for power amplifier signal limiting are disclosed. In certain embodiments, a power amplifier system includes a power amplifier that amplifies a radio frequency input signal, and a signal limiter operable to limit a signal power of the power amplifier when the radio frequency input signal exceeds a threshold. The signal limiter includes a radio frequency detector configured to generate a detection signal based on detecting a power level of the radio frequency input signal, and a latch configured to lock the signal limiter into an attenuating mode in response to the detection signal indicating that the threshold is exceeded.

Power Amplification With Reduced Gain Variation
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US Patent:

20220321074, Oct 6, 2022
Filed:

Mar 29, 2022
Appl. No.:

17/706854
Inventors:

- Irvine CA, US
Philip John LEHTOLA - Cedar Rapids IA, US
International Classification:

H03G 3/30
H03F 3/24
H03F 1/02
H03F 1/30
H04B 1/04
Abstract:

A power amplifier can include an input stage that includes an amplifying transistor having an input node and an output node, such that a signal at the input node has a first power level and an amplified signal at the output node has a second power level. The power amplifier can further include a bias circuit configured to provide a bias signal to the amplifying transistor, and a feedback circuit that couples the output node of the amplifying transistor to the input node of the amplifying transistor. The feedback circuit can include a resistance and a capacitance arranged in series. The power amplifier can further include a gain compensation circuit implemented relative to the input stage such that the second power level is compensated for a variation in temperature associated with the power amplifier.

Parallel Cascode Amplifier For Enhanced Low-Power Mode Efficiency
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US Patent:

20220255514, Aug 11, 2022
Filed:

Jan 19, 2022
Appl. No.:

17/578631
Inventors:

- Irvine CA, US
Philip John Lehtola - Cedar Rapids IA, US
International Classification:

H03F 3/213
H03F 1/02
Abstract:

In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Power Amplifier Junction Temperature Clamp
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US Patent:

20230112095, Apr 13, 2023
Filed:

Sep 28, 2022
Appl. No.:

17/955345
Inventors:

- Irvine CA, US
Philip John Lehtola - Cedar Rapids IA, US
International Classification:

H03F 1/52
H03F 3/24
Abstract:

A clamp circuit comprises a first diode stack comprising one or more diodes and an array comprising a second diode stack comprising one or more diodes and a comparator configured to compare a first voltage at the first diode stack to a second voltage at the second diode stack.

Power Amplifier Bias Circuit
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US Patent:

20230095390, Mar 30, 2023
Filed:

Sep 29, 2022
Appl. No.:

17/955989
Inventors:

- Irvine CA, US
Philip John Lehtola - Cedar Rapids IA, US
International Classification:

H03F 3/21
H01L 27/06
H01L 29/73
H01L 29/772
Abstract:

A power amplifier comprises a first transistor, a second transistor, a first emitter follower, a first bias resistor, and coupling circuitry configured to couple the first bias resistor to a base of the first transistor, the first bias resistor, the second bias resistor, and an emitter of the first emitter follower at a first node, and a base of the first emitter follower to the second transistor.