Osama O Awadelkarim

US Patent:

59949112, Nov 30, 1999

Filed:

Apr 24, 1997

Appl. No.:

8/842345

Inventors:

Stephen J. Fonash - State College PA
Osama O. Awadelkarim - State College PA
Murat Okandan - State College PA
Maria M. Ozaita-Mintegui - Bilbao, ES

Assignee:

The Penn State Research Foundation - University Park PA

International Classification:

G01R 3128

US Classification:

324759

Abstract:

An approach using two terminal current measurements, preferably in a cyclic current-voltage sweeping procedure, and specialized test structure, is shown to be very useful in detecting processing induced changes in poly-Si/ultra-thin SiO. sub. 2 /substrate Si structures. The charging current structure discernible in this approach is seen to have different features depending on processing history of the device. This is shown for the specific case of plasma gate definition etching with or without annealing.