Ofer Asaf Iny

US Patent:

7088731, Aug 8, 2006

Filed:

Jun 1, 2001

Appl. No.:

09/872289

Inventors:

Ofer Iny - Woodland Hills CA, US

Assignee:

Dune Networks - Agoura CA

International Classification:

H04L 12/28

US Classification:

370413, 370415, 370468

Abstract:

A method and system for managing memory in a packet switching device is disclosed. The method and system comprises managing the memory as a single FIFO when inserting packets and managing the memory as a plurality of FIFO queues when removing packets. A memory management scheme in accordance with the present invention takes advantage of the nature of packet switching to give an efficient implementation of multiple independent queues in a memory. The key observation that is made is that in a packet switch it is expected that packets may be stored in the memory for a time no greater than the time it takes to fill up the memory. If a packet due to extreme congestion is delayed longer than that, then deleting that packet is an acceptable result.

US Patent:

7095744, Aug 22, 2006

Filed:

May 30, 2001

Appl. No.:

09/867506

Inventors:

Ofer Iny - Woodland Hills CA, US

Assignee:

Dune Networks - Agoura CA

International Classification:

H04L 12/28

US Classification:

3703956, 370474

Abstract:

A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.

US Patent:

7525995, Apr 28, 2009

Filed:

Apr 6, 2005

Appl. No.:

11/099582

Inventors:

Ofer Iny - Woodland Hills CA, US

Assignee:

Dune Networks Inc. - Sunnyvale CA

International Classification:

H04J 3/24

US Classification:

370474, 370386

Abstract:

A system for switching variable size packets in a network is disclosed. The system comprises at least one ingress controller which receives a plurality of packets and which segments each of the packets into fixed sized fragments. The at least one ingress controller has a time-clock. The time clocks of all ingress controllers are synchronized to within a tolerance. Each fragment is tagged with at least a unique source of ID, time-stamp, and a fragment-number to form a cell. Each cell belongs to one packet having the same time-stamp value. The ingress controller sends each of the cells through a link such that a cell's destination is reachable through that link. The system includes a fabric element which receives cells from a plurality of inputs links. The cells are ordered. The fabric element sends ordered cells through a plurality of outputs and through which the destination of the cells is reachable.

US Patent:

7619970, Nov 17, 2009

Filed:

Jan 17, 2007

Appl. No.:

11/653941

Inventors:

Ofer Iny - Woodland Hills CA, US

Assignee:

Dune Semiconductor Ltd. - Yakum

International Classification:

H04L 12/56

US Classification:

370229, 370412, 370414

Abstract:

Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e. g. , prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.

US Patent:

7990858, Aug 2, 2011

Filed:

Nov 15, 2009

Appl. No.:

12/618734

Inventors:

Ofer Iny - Woodland Hills CA, US

Assignee:

Dune Networks, Inc. - Irvine CA

International Classification:

H04L 12/56

US Classification:

370229, 370389, 370413

Abstract:

Embodiments of the invention provide systems, devices and methods to schedule data transport across a fabric, e. g. , prior to actual transmission of the data across the fabric. In some demonstrative embodiments, a packet switch may include an input controller to schedule transport of at least one data packet to an output controller over a fabric based on permission information received from the output controller. Other embodiments are described and claimed.

US Patent:

20030142483, Jul 31, 2003

Filed:

Jan 30, 2002

Appl. No.:

10/066122

Inventors:

Ofer Iny - Woodland Hills CA, US

International Classification:

H05K007/02

US Classification:

361/788000, 361/781000, 361/785000, 710/301000

Abstract:

A switching device and a method for the configuration thereof is disclosed. A first aspect of the present invention comprises a switching device. The switching device comprises at least one line card and at least one switching card. The device includes a mid-plane coupled to the at least one line card and the at least one switching card. The A second aspect of the invention comprises a method for configuring a switching device. The method for configuring a switching device comprises providing a mid-plane, and providing at least one switching card and at least one line card on the mid-plane. The at least one switching card and the at least one line card are perpendicular to each other. Through the use of the present invention, line cards and/or switch cards can be connected to a mid-plane via a plurality of connectors wherein the line cards and switching cards are perpendicular to each other. By utilizing this configuration, the need for the signals from the line card to the switching cards no longer need to cross each other. Additionally, the interconnections are short and can be implemented in a few layers. This results in the use of smaller interconnection boards that contain substantially less layers, thereby reducing the overall production costs.