Nils E Schubert

US Patent:

6618839, Sep 9, 2003

Filed:

Nov 28, 2000

Appl. No.:

09/724840

Inventors:

John Mark Beardslee - Menlo Park CA
Nils Endric Schubert - Sunnyvale CA
Douglas L. Perry - San Ramon CA

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06T 1750

US Classification:

716 4, 716 5, 716 6, 714735

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

6823497, Nov 23, 2004

Filed:

Jul 31, 2002

Appl. No.:

10/210509

Inventors:

Nils Endric Schubert - Sunnyvale CA
John Mark Beardslee - Menlo Park CA
Gernot Heinrich Koch - Santa Clara CA
Olaf Poeppe - San Jose CA

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F 1750

US Classification:

716 4, 716 5

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

6904577, Jun 7, 2005

Filed:

Apr 2, 2003

Appl. No.:

10/406732

Inventors:

Nils Endric Schubert - Sunnyvale CA, US
John Mark Beardslee - Menlo Park CA, US
Douglas L. Perry - San Ramon CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F017/50

US Classification:

716 4, 716 5, 716 6

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

6931572, Aug 16, 2005

Filed:

Nov 28, 2000

Appl. No.:

09/724839

Inventors:

Nils Endric Schubert - Sunnyvale CA, US
John Mark Beardslee - Menlo Park CA, US
Douglas L. Perry - San Ramon CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F011/00

US Classification:

714 34, 714 31, 714 32, 714 30, 716 4

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. In particular, the techniques and systems relate to design instrumentation circuitry that facilitates the analysis, diagnosis and debugging of the hardware designs. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

7065481, Jun 20, 2006

Filed:

Jul 31, 2002

Appl. No.:

10/212128

Inventors:

Nils Endric Schubert - Sunnyvale CA, US
John Mark Beardslee - Menlo Park CA, US
Gernot Heinrich Koch - Santa Clara CA, US
Olaf Poeppe - San Jose CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

703 14, 703 15, 703 17, 716 4, 716 6, 395704, 438 14

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

7069526, Jun 27, 2006

Filed:

Dec 29, 2004

Appl. No.:

11/027052

Inventors:

Nils Endric Schubert - Sunnyvale CA, US
John Mark Beardslee - Menlo Park CA, US
Douglas L. Perry - San Ramon CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

716 4, 716 5

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

7072818, Jul 4, 2006

Filed:

Nov 28, 2000

Appl. No.:

09/724585

Inventors:

John Mark Beardslee - Menlo Park CA, US
Nils Endric Schubert - Sunnyvale CA, US
Douglas L. Perry - San Ramon CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

703 14, 703 16, 716 4

Abstract:

Techniques and systems for debugging an electronic system having instrumentation circuitry included therein are disclosed. The techniques and systems facilitate analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the invention enables the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

US Patent:

7356786, Apr 8, 2008

Filed:

Aug 9, 2004

Appl. No.:

10/915516

Inventors:

Nils Endric Schubert - Sunnyvale CA, US
John Mark Beardslee - Menlo Park CA, US
Gernot Heinrich Koch - Santa Clara CA, US
Olaf Poeppe - San Jose CA, US

Assignee:

Synplicity, Inc. - Sunnyvale CA

International Classification:

G06F 17/50

US Classification:

716 4

Abstract:

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.