Shih-Hsing Huang - San Jose CA, US Narayanan Raman - Milpitas CA, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
G06F 1/12 H04L 7/00
US Classification:
713400, 713500, 713502
Abstract:
A method synchronizes serial data stream output from a multiple-port system. The multiple-port system includes a plurality of port devices. The method includes (a) timing a serial data stream at each port device, the serial data stream including a series of data frames, (b) generating a framing signal at each port device, the framing signal indicating a boundary of the data frame in the serial data stream, (c) supplying the framing signal to a next port device, and (d) synchronizing, at each next port, the timing of the serial data stream in response to the supplied framing signal.
Time Division Media Access Controller And Method Of Operation Thereof
Majid Bemanian - Pleasanton CA, US Narayanan Raman - Milpitas CA, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
H04J 3/00 H04L 12/56
US Classification:
370498, 370419, 370420
Abstract:
A time division media access controller for use with a multi-port data switch and a method of controlling media access. In one embodiment, the time division media access controller includes a time division receive engine, a time division transmit engine and a time division arbiter coupled to the time division receive and transmit engines. The time division receive engine accepts data from a plurality of data ports and the time division transmit engine provides data to a plurality of data ports. The time division arbiter controls states of the time division receive and transmit engines based on throughput requirements of the data. In preferred embodiments, the time division media access controller complies with the IEEE 802. 3 ethernet standard.
Multiple Port System And Method For Controlling The Same
Shih-Hsing Huang - San Jose CA, US Narayanan Raman - Milpitas CA, US
Assignee:
LSI Logic Corporation - Milpitas CA
International Classification:
G06F012/00
US Classification:
711149, 711 1, 711 2, 370392
Abstract:
A multiple port system includes a plurality of port devices, each port device including a control register set, and a control bus coupled to the plurality of port devices. The control bus provides a control signal to each port device, and the control signal includes port address information and register address information. The control register set includes a set of registers responsive to the control signal if the port address information indicates the corresponding port device, and a designated register responsive to the control signal if the port address information indicates one of the plurality of the port devices and the register address information indicates the designated register.
Mar 2010 to 2000 Verification and developmentIBM India Pvt Ltd, India
Jul 2008 to Feb 2010 LBIST verification of IBM processor coresTATA CONSULTANCY SERVICES, India
Jun 2005 to Jun 2008INDIAN INSTITUTE OF ASTROPHYSICS, India Bangalore, Karnataka Aug 2002 to May 2005 Design and development of the CMOS Imager controllerWIPRO TECHNOLOGIES, India
Jul 2000 to Jul 2002
Education:
Cochin University of Science and Technology M.Tech in Digital Electronics