Jabil
Principal Design Engineer
Duet Microelectronics
Design Engineer
Spirent Communications May 2013 - Nov 2016
Staff Engineer
Anadigics 2007 - Mar 2013
Principal Asic Design Engineer
Te Connectivity Oct 2003 - Oct 2007
Principal Asic Design Engineer
Education:
New York University - Polytechnic School of Engineering 1996 - 1999
Master of Science, Masters, Bachelors, Bachelor of Science, Computer Engineering
Skills:
Systemverilog Digital Design Asic Fpga Verilog Vhdl Rtl Design Vlsi Cmos Matlab Xilinx Python Tcl Perl C Java Assembly Modelsim Nc Verilog Sdh Atm Microcontrollers Dsp Timing Closure Static Timing Analysis Formal Verification Integrated Circuit Design Ncsim Digital Signal Processors Simulations Drc Primetime Analog Application Specific Integrated Circuits Field Programmable Gate Arrays
May 2012 to Jan 2013 SurveyorPivot Engineering Contracting Comp Abu Dhabi May 2009 to Mar 2011 Land SurveyorPivot Engineering Contracting Company Abu Dhabi Jun 2008 to May 2009 LAND Surveyorcapital survey Abu Dhabi Mar 2007 to Feb 2008 Land SurveyorDescon Engineering Khair, Uttar Pradesh Aug 2006 to Feb 2007 Land SurveyorDescon Engineering
Jun 2005 to Jul 2006 land SurveyorCOMPAN Y Islamabad Mar 2003 to May 2005 land Surveyor
Education:
high school khewra 1999 to 2002 diploma in land surveyor