Abstract:
An indexed memory coordinator is disclosed which includes a master unit and one or more slave units connected thereto. Each of the units, master and slave, includes a compartment for receiving a recording tape cassette along with an associated record/play head and a motor for driving the tape. The master unit alone contains all of the electronic circuitry for controlling the heads and motors for all the units. All the units are interconnected in parallel via plugs and jacks to the common circuitry in the master unit. Additionally, each unit includes a switch mechanism for conditioning that unit into either the record or playback mode, and when in such a mode, the unit utilizes the common circuitry in the master unit for driving its motor and tape heads.