Miles B Reyes

US Patent:

20030202520, Oct 30, 2003

Filed:

Apr 26, 2002

Appl. No.:

10/132988

Inventors:

Michael Witkowski - Tomball TX, US
Lih-Sheng Chiou - San Jose CA, US
Sompong Olarig - Pleasanton CA, US
John Jenne - Houston TX, US
Miles Reyes - Tomball TX, US

Assignee:

MaXXan Systems, Inc.

International Classification:

H04L012/66

US Classification:

370/400000, 370/422000, 370/398000, 370/395100

Abstract:

A scalable switch fabric system and apparatus for computer networks. The scalable switch fabric system and apparatus comprises a Switch Fabric Subsystem, Input-Output Subsystems, Application Subsystems and System Control Subsystems. The Switch Fabric Subsystem is a protocol agnostic cell or packet switching infrastructure that provides scalable interconnections between the Input-Output Subsystems and Application Subsystems. The Switch Fabric Subsystem provides primary data paths for network traffic being moved by the switch. The Input-Output Subsystems connect to the external network devices that use the switch to communicate with other external network devices. The Input-Output Subsystems are part of the data path and do low level decoding of ingress frames from the external ports; switching/routing, identifying the destination Input-Output Subsystems for the frame; and queuing the frame for transmission through the Switch Fabric. The System Control Subsystems provide overall management of the scalable switch fabric system and apparatus.

US Patent:

20080239687, Oct 2, 2008

Filed:

Mar 29, 2007

Appl. No.:

11/729470

Inventors:

Kevin B. Leigh - Houston TX, US
Jonathan E. James Ou - Houston TX, US
David W. Sherrod - Tomball TX, US
Kurt A. Manweiler - Tomball TX, US
Miles B. Reyes - Houston TX, US
Gregory L. Gibson - The Woodlands TX, US
Stephen A. Kay - Tomball TX, US
Vincent W. Michna - Houston TX, US

International Classification:

H01R 12/16

US Classification:

361788

Abstract:

Embodiments of the present technique are directed to a backplane infrastructure. The backplane infrastructure may include a passive power backplane configured to distribute power and comprising a first set of alignment holes, a signal backplane configured to route interface signals and comprising a second set of alignment holes and a set of common alignment pins, each alignment pin having an axis, wherein the set of common alignment pins are inserted into the first set of alignment holes and the second set of alignment holes to align the passive power backplane and the signal backplane about the axis.