Michael E Scaman

US Patent:

6400128, Jun 4, 2002

Filed:

Mar 19, 2001

Appl. No.:

09/811884

Inventors:

Daniel Guidotti - Yorktown Heights NY
Arnold Halperin - Cortlandt Manor NY
Michael E. Scaman - Goshen NY
Arthur R. Zingher - White Plains NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 3102

US Classification:

324 731, 324752, 3241581, 324537, 250492

Abstract:

A system and method for locating a circuit defect, such as a short or an incipient open, in an electric circuit in a workpiece, such a Printed Circuit Board (PCB) or MultiChip Module (MCM). The circuit is connected to a device for sensitively measuring any resistance change. A thermal stimulus is applied to various subsets of the surface of the workpiece, the thermal stimulus being temporally modulated, and the resistance change measurement correlated with this modulation. By applying well-designed thermal stimulus subsets, resistance measurements may be logically combined which correspond to the plural thermal stimulus subsets. Further, the search region where the defect may be located may be iteratively refined. By measuring the time delay between the thermal stimulus and corresponding resistance change, the depth of a defect below the surface of the workpiece is further determined. Thus the system and method efficiently and accurately locates a defect in three dimensions, even if the workpiece is large, and the defect is small and underneath the surface.

US Patent:

6781141, Aug 24, 2004

Filed:

Oct 29, 2002

Appl. No.:

10/284509

Inventors:

Michael Edward Scaman - Goshen NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

A61N 500

US Classification:

2504923, 250306, 250310, 250311, 250396 R, 250397, 250398, 2504921

Abstract:

As disclosed herein, a system and method are provided for detection and measurement of noise on E beam tools and devices including a spectrum analyzer which looks at the different frequency components of the noise. The deflected electron beam from the tool is calibrated in a coarse and fine mode by scanning the beam over a grid-like calibration target. The position of where the bars are detected is compared to where they actually are, and the deflection can be calibrated so that it matches the grid. This invention can utilize a Fast Fourier Transform (FFT) of the time-ordered data which allows one to see peaks associated with noise.

US Patent:

6785615, Aug 31, 2004

Filed:

Oct 29, 2002

Appl. No.:

10/284510

Inventors:

Michael Edward Scaman - Goshen NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01N 3100

US Classification:

702 27, 250306, 250307, 250310, 250311, 2504911, 2504922

Abstract:

An apparatus and method for detection of electromechanical and mechanical errors in an electron beam device is provided. First the existing subfield is divided into a gridlike structure where each grid can be considered a target. Then a plurality of target points are provided on each grid for measuring combined directional variances. The separated horizontal and vertical variances is also measured for each of the target points. This leads to the performance of a significance tests, based on the F statistic which we refer to as F , for horizontal and vertical values of each target points during which F values are also obtained. The F values are then compared for horizontal and vertical values and an error alert provided when there is a sufficiently large disparity between the separated F values. In an alternate embodiment of the present invention, a three dimensional grid is also provided to be used in a similar manner. The severity of the error can also be determined based on the disparity of the values.

US Patent:

6800864, Oct 5, 2004

Filed:

Oct 29, 2002

Appl. No.:

10/284511

Inventors:

Michael Edward Scaman - Goshen NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01J 37304

US Classification:

25049222, 250310, 250311, 250307, 250306

Abstract:

An apparatus and method for reducing noise and resonance detractors connected with and E beam tool. The invention provides a plurality of embodiments. In one embodiment, the E beam tool will be calibrated and the results will be then filtered to counter the effects of the noise afterwards. In an alternate embodiment of the present invention, a filter is applied in the actual feedback of the E beam tool for the writing cycle.

US Patent:

7187179, Mar 6, 2007

Filed:

Oct 19, 2005

Appl. No.:

11/163450

Inventors:

Michael E. Scaman - Goshen NY, US
Toshiaki Yanagisawa - Stormville NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 31/08

US Classification:

324512, 257 48, 257 18, 257751, 324751, 324765, 324763

Abstract:

A wiring test structure includes a plurality of wiring traces configured in an interleaving spiral pattern. At least one of the plurality of wiring traces configured for open circuit testing therein, and at least a pair of the plurality of wiring traces is configured for short circuit testing therebetween.

US Patent:

7353472, Apr 1, 2008

Filed:

Aug 12, 2005

Appl. No.:

11/202591

Inventors:

David L. DeMaris - Austin TX, US
Timothy G. Dunham - South Burlington VT, US
William C. Leipold - Enosburg Falls VT, US
Daniel N. Maynard - Craftsbury Common VT, US
Michael E. Scaman - Goshen NY, US
Shi Zhong - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50

US Classification:

716 4, 716 5, 716 7

Abstract:

A system and method for generating test patterns for a pattern sensitive algorithm. The method comprises the steps extracting feature samples from a layout design; grouping feature samples into clusters; selecting at least one area from the layout design that covers a feature sample from each cluster; and saving each pattern layout covered by the at least one area as test patterns.

US Patent:

7360199, Apr 15, 2008

Filed:

May 26, 2006

Appl. No.:

11/420534

Inventors:

Michael E. Scaman - Goshen NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50
G06K 9/00

US Classification:

716 19, 716 4, 716 21, 382144

Abstract:

The present invention is an iterative method or procedure involving a series of optical proximity correction (OPC) process steps for refining an integrated circuit design layout on a wafer during a photolithographic process. The iterative method may be applied as a system and computer program to perform classifying and grouping edge fragments according to directional orientations, selecting an edge fragment or a combination of non-opposing edge fragments, calculating an edge placement error of the selected edge fragment and proximally shifting the edge fragment until a quality limitation is met.

US Patent:

7673279, Mar 2, 2010

Filed:

Feb 19, 2008

Appl. No.:

12/033102

Inventors:

Michael E. Scaman - Goshen NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 17/50
G06K 9/00

US Classification:

716 19, 716 4, 716 9, 716 21

Abstract:

The present invention is an iterative method or procedure involving a series of optical proximity correction (OPC) process steps for refining an integrated circuit design layout on a wafer during a photolithographic process. The iterative method may be applied as a system and computer program to perform classifying and grouping edge fragments according to directional orientations, selecting an edge fragment or a combination of non-opposing edge fragments, calculating an edge placement error of the selected edge fragment and proximally shifting the edge fragment until a quality limitation is met.