Michael D Fattu

age ~47

from Austin, TX

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Also known as:

Michael David Fattu
Michael D David
Michail Fattu
Mike D Fattu
Michael D Fatta
Michael D Pattu
Michael Sattu

Phone and address:: 11520 Antigua Dr, Austin, TX 78759
512 284-8514

Connected to:

Michael Fattu Phones & Addresses

11520 Antigua Dr, Austin, TX 78759 • 512 284-8514
12709 Marimba Trl, Austin, TX 78729 • 512 257-2679
711 Arrowhead Trl, Cedar Park, TX 78613 • 512 992-0555
520 Toftrees Ave, State College, PA 16803 • 814 861-5121
502 Northfield Rd, Devon, PA 19333 • 610 964-0165
Dothan, AL

Skills

Product Development • Semiconductors • Test Engineering • Lean Manufacturing • Six Sigma • Spc • Design of Experiments • Process Engineering • Value Stream Map • Kaizen • Electronics Manufacturing • Manufacturing Test • Test Management • Measurement Tools • Perl Script • Sql • Manufacturing • 5S • Automation • Cmos • Continuous Improvement • Cross Functional Team Leadership • Debugging • Design For Manufacturing • Electronics • Engineering • Engineering Management • Fmea • Failure Analysis • Hardware • Jmp • Jtag • Mems • Manufacturing Engineering • Root Cause Analysis • Test Equipment • Testing • Value Stream Mapping • Yield

Interests

Human Rights • Science and Technology • Education • Economic Empowerment

Industries

Telecommunications

Us Patents

Universal Manufacturing Test Platform
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US Patent:

20180106702, Apr 19, 2018
Filed:

Oct 13, 2016
Appl. No.:

15/293037
Inventors:

- Armonk NY, US
Michael FATTU - Austin TX, US
Rachael C. FREITAS - Austin TX, US
George ZACHARAKIS-JUTZ - Austin TX, US
International Classification:

G01M 99/00
Abstract:

Embodiments herein describe a universal test platform that includes a universal test station (UTS) coupled to a system under test (SUT) using respective adapters. The adapters include an interface subdivided into portions that are assigned to different data and power standards. In one embodiment, the UTS is coupled to a UTS adapter using a plurality of cables that transmits the different data and power signals between the UTS and the adapter. For example, the interface in the UTS adapter may include a plurality of pins or optical channels that are each coupled to one of the plurality of cables. The SUT is coupled to a SUT adapter which may have the same interface as the UTS adapter. However, the SUT may be coupled to only a sub-portion of the I/O elements in the SUT adapter, and thus, only some of the I/O elements are used when testing the SUT.

Resumes

Michael Fattu

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Location:

Austin, TX

Industry:

Telecommunications

Skills:

Product Development
Semiconductors
Test Engineering
Lean Manufacturing
Six Sigma
Spc
Design of Experiments
Process Engineering
Value Stream Map
Kaizen
Electronics Manufacturing
Manufacturing Test
Test Management
Measurement Tools
Perl Script
Sql
Manufacturing
5S
Automation
Cmos
Continuous Improvement
Cross Functional Team Leadership
Debugging
Design For Manufacturing
Electronics
Engineering
Engineering Management
Fmea
Failure Analysis
Hardware
Jmp
Jtag
Mems
Manufacturing Engineering
Root Cause Analysis
Test Equipment
Testing
Value Stream Mapping
Yield

Interests:

Human Rights
Science and Technology
Education
Economic Empowerment