Michael J Brian

US Patent:

45491658, Oct 22, 1985

Filed:

Jun 22, 1984

Appl. No.:

6/623737

Inventors:

Michael Brian - Garland TX

Assignee:

Rockwell International Corporation - El Segundo CA

International Classification:

G08C 900

US Classification:

340347CC

Abstract:

When an A/D converter is converting a multilevel analog signal into a plurality of distinct digital words, it needs to have a very accurate reference voltage which is tied to the voltage levels of the analog signal being converted for high accuracy. The present invention takes the most significant bit and an error bit signal from the analog-to-digital converter and logically combines these signals in such a way that error feedback signals are generated which are integrated over the long term and used to adjust the reference voltages supplied to the analog-to-digital converter wherein the feedback error signals average to zero.

US Patent:

45659931, Jan 21, 1986

Filed:

Jun 22, 1984

Appl. No.:

6/623738

Inventors:

Michael Brian - Garland TX

Assignee:

Rockwell International Corporation - El Segundo CA

International Classification:

H03M 112

US Classification:

340347AD

Abstract:

If the timing of detection of an analog signal, by an A/D converter, with respect to its theoretical value is optimum, the most significant error bit output by the A/D converter will integrate to a zero value. The present invention takes the information indicative of the most recent history of amplitude variation of the analog signal to logically modify (affect polarity) the most significant error bit and apply it to an integrator. The integrated value is used to adjust a variable time delay clock circuit use in determining the detection time in the A/D converter.

US Patent:

52753719, Jan 4, 1994

Filed:

Jan 22, 1992

Appl. No.:

7/823947

Inventors:

Michael Brian - Garland TX
Larry D. McPherson - Allen TX
William F. Weber - Allen TX

Assignee:

Alcatel Network Systems, Inc. - Richardson TX

International Classification:

F16M 1300

US Classification:

248618

Abstract:

A springy, low dielectric retainer device in the form of a rod, a triangle, an ellipse or whatever, is used in a compressed condition to hold RF energy absorber blocks in position juxtaposed "energy leaky" RF circuitry. The absorber blocks are held in position due to frictional forces provided by the compressed retainer. In this manner, the absorber blocks can be re-positioned to obtain optimum amplitude/frequency response characteristics from the affected RF circuit.