Matthew T Spuller from 1307 Notre Dame Ave, Belmont, CA 94002, age 48

Us Patents

Graded Arc For High Na And Immersion Lithography
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US Patent:

7776516, Aug 17, 2010
Filed:

Jul 18, 2006
Appl. No.:

11/488528
Inventors:

Wendy H. Yeh - Mountain View CA, US
Martin J. Seamons - San Jose CA, US
Matthew Spuller - Palo Alto CA, US
Sum-Yee Betty Tang - San Jose CA, US
Kwangduk Douglas Lee - Santa Clara CA, US
Sudha Rathi - San Jose CA, US
Assignee:

Applied Materials, Inc. - Santa Clara CA
International Classification:

G03F 7/26
US Classification:

430313, 430311, 430317
Abstract:

A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.

Low Temperature Conformal Oxide Formation And Applications
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US Patent:

7851385, Dec 14, 2010
Filed:

Sep 30, 2008
Appl. No.:

12/241826
Inventors:

Matthew Spuller - San Francisco CA, US
Melody Agustin - Santa Clara CA, US
Li-Qun Xia - Cupertino CA, US
Reza Arghavani - Scotts Valley CA, US
Assignee:

Applied Materials, Inc. - Santa Clara CA
International Classification:

H01L 21/31
H01L 21/469
C23C 16/40
C23C 16/00
US Classification:

438788, 438787, 438789, 438790, 257E21278, 257E21279, 42725528, 42725537, 42725529, 427569
Abstract:

The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.

Graded Arc For High Na And Immersion Lithography
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US Patent:

8125034, Feb 28, 2012
Filed:

Jun 9, 2010
Appl. No.:

12/797406
Inventors:

Wendy H. Yeh - Mountain View CA, US
Martin J. Seamons - San Jose CA, US
Matthew Spuller - Palo Alto CA, US
Sum-Yee Betty Tang - San Jose CA, US
Kwangduk Douglas Lee - Santa Clara CA, US
Sudha Rathi - San Jose CA, US
Assignee:

Applied Materials, Inc. - Santa Clara CA
International Classification:

H01L 23/48
US Classification:

257368, 257369, 257437, 257774
Abstract:

A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.

Gas-Expanded Liquids, Methods Of Use Thereof, And Systems Using Gas-Expanded Liquids For Cleaning Integrated Circuits
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US Patent:

20040103924, Jun 3, 2004
Filed:

Nov 21, 2003
Appl. No.:

10/719716
Inventors:

Matthew Spuller - Atlanta GA, US
Dennis Hess - Atlanta GA, US
International Classification:

B08B003/00
US Classification:

134/034000, 134/037000, 134/003000, 134/042000, 134/05600R, 257/798000, 428/543000
Abstract:

Gas-expanded liquids, methods of use thereof, and systems of using gas-expanded liquids are provided. One exemplary system, among others, includes: a gas-expanded liquid system comprising a gas and a liquid, wherein the gas-expanded liquid system is adapted to generate a gas-expanded liquid; and a substrate handling system adapted to position a substrate having a photoresist layer so that the gas-expanded liquid can be made to contact the substrate to remove the photoresist layer.

Method For Plasma Processing
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US Patent:

20080008842, Jan 10, 2008
Filed:

Jul 7, 2006
Appl. No.:

11/483951
Inventors:

Jyr Hong Soo - Santa Clara CA, US
Matthew Spuller - Palo Alto CA, US
Michael S. Cox - Davenport CA, US
Martin Jay Seamons - San Jose CA, US
Amir Al-Bayati - San Jose CA, US
Bok Hoen Kim - San Jose CA, US
Hichem M'Saad - Santa Clara CA, US
International Classification:

H05H 1/24
US Classification:

427569, 427576
Abstract:

Methods for reducing plasma instability for plasma depositing a dielectric layer are provided. In one embodiment, the method includes providing a substrate in a plasma processing chamber, flowing a gas mixture into the chamber, applying an RF power to an electrode to form a plasma in the chamber, and collecting DC bias information. In another embodiment, the method for plasma processing includes obtaining of DC bias information over a plurality of plasma generation events, and determining an RF power application parameter from the DC bias information.

Plasma-Induced Charge Damage Control For Plasma Enhanced Chemical Vapor Deposition Processes
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US Patent:

20080254233, Oct 16, 2008
Filed:

Apr 10, 2007
Appl. No.:

11/733531
Inventors:

KWANGDUK DOUGLAS LEE - Santa Clara CA, US
Matthew Spuller - Palo Alto CA, US
Martin Jay Seamons - San Jose CA, US
Wendy H. Yeh - Mountain View CA, US
Bok Hoen Kim - San Jose CA, US
Mohamad Ayoub - San Jose CA, US
Amir Al-Bayati - San Jose CA, US
Derek R. Witty - Fremont CA, US
Hichem M'Saad - Santa Clara CA, US
International Classification:

C23C 14/28
US Classification:

427595
Abstract:

Methods of depositing amorphous carbon films on substrates are provided herein. The methods reduce or prevent plasma-induced charge damage to the substrates from the deposition of the amorphous carbon films. In one aspect, an initiation layer of amorphous carbon is deposited at a low RF power level and/or at a low hydrocarbon compound/inert gas flow rate ratio before a bulk layer of amorphous carbon is deposited. After the deposition of the initiation layer, the RF power, hydrocarbon flow rate, and inert gas flow rate may be ramped to final values for the deposition of the bulk layer, wherein the RF power ramp rate is typically greater than the ramp rates of the hydrocarbon compound and of the inert gas. In another aspect, a method of minimizing plasma-induced charge damage includes depositing a seasoning layer on one or more interior surfaces of a chamber before the deposition of the amorphous carbon film on a substrate therein or coating the interior surfaces with an oxide or dielectric layer during manufacturing.

Plasma Processing With Tunable Nitridation
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US Patent:

20230127138, Apr 27, 2023
Filed:

Aug 22, 2022
Appl. No.:

17/892968
Inventors:

- Santa Clara CA, US
Shashank SHARMA - Fremont CA, US
Matthew SPULLER - Belmont CA, US
Vladimir NAGORNY - Tracy CA, US
International Classification:

C23C 8/36
H01J 37/32
H01L 21/02
C23C 8/24
Abstract:

In an embodiment, a method for nitriding a substrate is provided. The method includes flowing a nitrogen-containing source and a carrier gas into a plasma processing source coupled to a chamber such that a flow rate of the nitrogen-containing source is from about 3% to 20% of a flow rate of the carrier gas; generating an inductively-coupled plasma (ICP) in the plasma processing source by operating an ICP source, the ICP comprising a radical species formed from the nitrogen-containing source, the carrier gas, or both; and nitriding the substrate within the chamber, wherein nitriding includes operating a heat source within the chamber at a temperature from about 150 C. to about 650 C. to heat the substrate; maintaining a pressure of the chamber from about 50 mTorr to about 2 Torr; introducing the ICP to the chamber; and adjusting a characteristic of the substrate by exposing the substrate to the radical species.

System And Method For Radical And Thermal Processing Of Substrates
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US Patent:

20210280418, Sep 9, 2021
Filed:

Dec 16, 2020
Appl. No.:

17/123386
Inventors:

- Santa Clara CA, US
Abhilash J. MAYUR - Salinas CA, US
Shashank SHARMA - Fremont CA, US
Norman L. TAM - Cupertino CA, US
Matthew SPULLER - Belmont CA, US
Zeqiong ZHAO - Santa Clara CA, US
International Classification:

H01L 21/02
H01L 27/11556
Abstract:

The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume being in fluid communication with a plasma source. The substrate can include a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method can also include forming an oxide cap layer over a silicon-containing layer of the channel structure and exposing the oxide cap layer to a hydrogen-or-deuterium radical to nucleate the silicon-containing layer of the channel structures of the substrate. Forming the oxide cap layer and exposing the channel structure with the hydrogen radical occurs in the first processing chamber to form a nucleated substrate. The method can also include positioning the nucleated substrate in a second processing chamber with a second processing volume and heating the nucleated substrate in the second processing chamber.