Matthew B King

Author:

Matthew King

ISBN #:

0787948659

Author:

Matthew A. King

ISBN #:

0662279514

Author:

Matthew J. King

ISBN #:

0080444288

US Patent:

20190165784, May 30, 2019

Filed:

Nov 7, 2018

Appl. No.:

16/183336

Inventors:

- Pasadena CA, US
Matthew E. King - Pasadena CA, US
Colin McKinney - Pasadena CA, US

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

H03K 19/003
H01L 23/538
H01L 23/00
H05K 1/18

Abstract:

An LVDS device wherein driver and receiver functionalities are integrated in the same package, signals are routed from the individual driver and receiver elements inside the package such that all inputs are one side of the package, and all outputs are on the opposite side of the package, allowing for an optimized signal flow through the package. All required capacitors and resistors are integrated inside the package; no external electronic components are required. All of the above novelties also contribute to a 6:1 reduction in size compared to current state-of-the-art, for the same number of communication channels. Embodiments include a packaging topology adaptable to extreme environments, including radiation tolerant to 300 kRad (based on the die technology), so that module operational temperature is in a range of −55 C. to +100 C. and storage temperature can be as low as −184 C.

US Patent:

20160315152, Oct 27, 2016

Filed:

Jun 17, 2016

Appl. No.:

15/186193

Inventors:

KAREN M. RENALDO - PASADENA CA, US
ERIC J. STEWART - SILVER SPRING MD, US
ROBERT S. HOWELL - SILVER SPRING MD, US
HOWELL GEORGE HENRY - ELLICOTT CITY MD, US
HARLAN CARL CRAMER - COLUMBIA MD, US
JUSTIN ANDREW PARKE - ELLICOTT CITY MD, US
MATTHEW RUSSELL KING - LINTHICUM MD, US

Assignee:

NORTHROP GRUMMAN SYSTEMS CORPORATION - FALLS CHURCH VA

International Classification:

H01L 29/15
H01L 29/06
H01L 29/66
H01L 29/205
H01L 29/417
H01L 21/3065
H01L 21/768
H01L 29/778
H01L 29/20

Abstract:

An integrated circuit is disclosed that includes a single channel device having a first portion of a single shared heterostructure overlying a substrate structure in a single channel device area, and a gate contact that is in contact with the first portion of the single shared heterostructure. The integrated circuit also includes a multichannel device comprising a second portion of the single shared heterostructure overlying the substrate structure in a multichannel device area, a barrier layer overlying the second portion of the single shared heterorstructure, and a superlattice structure overlying the barrier layer, the superlattice structure comprising a plurality of heterostructures. An isolation region in the single shared heterostructure electrical isolates the single channel device from the multichannel device.