Mark R Keyse

US Patent:

6426663, Jul 30, 2002

Filed:

Mar 4, 1996

Appl. No.:

08/610007

Inventors:

Gregory Jon Manlove - Kokomo IN
Mark Billings Kearney - Kokomo IN
Mark Russell Keyse - Sharpsville IN
Richard Joseph Ravas - Kokomo IN

Assignee:

Delphi Technologies, Inc. - Troy MI

International Classification:

H03F 102

US Classification:

327307, 330259

Abstract:

An analog signal gain circuit includes an input receiving an analog input signal defined by an ac signal component due to a driving force and a dc offset component independent of the driving force and an output providing an analog output signal defined by an amplified representation of the analog input signal and a dc offset component corresponding to a reference signal. A digital/analog feedback circuit includes a comparator having the reference signal as a switching threshold connected to an up/down counter having a number of digital outputs. The outputs of the up/down counter are connected to a D/A converter which converts the digital count to an analog feedback signal. The feedback signal is provided to the input of the analog signal gain circuit to minimize variations in the dc offset signal component of the analog output signal by compensating for the dc offset signal component of the analog input signal. The up/down counter is clocked at a slow rate to thereby provide a long time constant for minimizing the dc offset signal component.

US Patent:

6806756, Oct 19, 2004

Filed:

Jun 16, 2003

Appl. No.:

10/462177

Inventors:

Gregory J. Manlove - Kokomo IN
Mark R. Keyse - Sharpsville IN

Assignee:

Delphi Technologies, Inc. - Troy MI

International Classification:

H03L 500

US Classification:

327307

Abstract:

Analog signal conditioning circuitry is provided for processing an analog signal generated by a sensor to remove DC offset. The signal conditioning circuitry includes an amplifier having the first input receiving an analog input signal and a second input receiving a reference signal. The amplifier includes an output providing an analog output signal defined by an amplified representation of the analog input signal and the reference signal. The circuitry includes a feedback circuit having an input coupled to the amplifier output and an output coupled to the first input of the amplifier for providing an analog feedback signal. The feedback circuit includes an analog-to-digital converter for converting the analog amplifier output to a digital signal, a digital controller for processing the digital signal, and a digital to analog converter for converting the processed digital signal to an analog feedback signal.

US Patent:

6937083, Aug 30, 2005

Filed:

Oct 15, 2004

Appl. No.:

10/966233

Inventors:

Gregory J. Manlove - Kokomo IN, US
Mark R. Keyse - Sharpsville IN, US

Assignee:

Delphi Technologies, Inc. - Troy MI

International Classification:

H03L005/00

US Classification:

327307

Abstract:

Analog signal conditioning circuitry is provided for processing an analog signal generated by a sensor to remove DC offset. The signal conditioning circuitry includes an amplifier having the first input receiving an analog input signal and a second input receiving a reference signal. The amplifier includes an output providing an analog output signal defined by an amplified representation of the analog input signal and the reference signal. The circuitry includes a feedback circuit having an input coupled to the amplifier output and an output coupled to the first input of the amplifier for providing an analog feedback signal. The feedback circuit includes an analog-to-digital converter for converting the analog amplifier output to a digital signal, a digital controller for processing the digital signal, and a digital to analog converter for converting the processed digital signal to an analog feedback signal.

US Patent:

8643333, Feb 4, 2014

Filed:

Aug 31, 2011

Appl. No.:

13/221942

Inventors:

Seyed R. Zarabadi - Kokomo IN, US
Thomas Gerard Block - Carmel IN, US
Mark R. Keyse - Sharpsville IN, US

Assignee:

Delphi Technologies, Inc. - Troy MI

International Classification:

H02J 7/00
H01M 10/46
G01N 27/416

US Classification:

320116, 324433

Abstract:

A battery monitor system for determining a cell voltage between a low side contact and a high side contact of a cell in situ as one of a plurality of cells connected in series to form a battery. The system uses an arrangement of switches and capacitors to shift relatively high absolute voltages of a battery stack to a relative low voltage level so lower voltage electronics can be used to monitor cell voltages. The system may be configured to provide a single ended measurement or a differential measurement indicative of a cell voltage. The differential measurement may be advantageous to correct or offset signal noise caused by electromagnetic interference (EMI).

US Patent:

20050109935, May 26, 2005

Filed:

Mar 19, 2004

Appl. No.:

10/804741

Inventors:

Gregory Manlove - Kokomo IN, US
Mark Keyse - Sharpsville IN, US
Robert Constable - Kokomo IN, US

International Classification:

G01D005/34

US Classification:

250300000

Abstract:

A sensor and method are provided for sensing characteristics, such as pressure and temperature, and transmitting the sensed characteristics and stored data in first and second data communication protocols. The sensor includes stored data transmit in an output signal according to a first data communication protocol. The sensor senses pressure and temperature and transmits the sensed pressure and temperature characteristics in a pulse width modulated output signal according to a second data communication protocol. The stored data is transmit following a power reset, and subsequent thereto the sensed data is transmit.

US Patent:

20110015804, Jan 20, 2011

Filed:

Jul 17, 2009

Appl. No.:

12/504939

Inventors:

Charles A. Cluff - Zionsville IN, US
Robert H. Obremski - Kokomo IN, US
Mark R. Keyse - Sharpsville IN, US

Assignee:

DELPHI TECHNOLOGIES, INC. - Troy MI

International Classification:

G06F 7/00

US Classification:

701 1

Abstract:

A system and method are provided for communicating data synchronously with a plurality of crash sensors onboard a vehicle. The system includes a control unit comprising interface circuitry for communicating with a plurality of crash sensors and providing synchronization signals to the crash sensors. The system also includes a communication bus coupled to the control unit for communicating with the crash sensors. The system further includes a plurality of crash sensors connected to the communication bus for communicating with the control unit. Each of the plurality of crash sensors receives one or more synchronization signals and is capable of transmitting data in response to the synchronous signals. The plurality of crash sensors each comprises logic for comparing a sensed parameter to a threshold and transmitting data when the sensed parameter exceeds the threshold. The logic further periodically transmits data based at least one of a time period and a synchronization count when the sensed parameter is less than the threshold.

US Patent:

58569413, Jan 5, 1999

Filed:

Sep 15, 1997

Appl. No.:

8/929457

Inventors:

Mark Russell Keyse - Sharpsville IN
Gregory Jon Manlove - Kokomo IN
Seyed Ramezan Zarabadi - Kokomo IN

Assignee:

Delco Electronics Corporation - Kokomo IN

International Classification:

G11C 1100

US Classification:

365154

Abstract:

A cross-coupled latch circuit that is a one-time programmable latch that allows volatile temporary writes to the latch prior to permanent programming of the latch. The latch circuit includes first and second programmable FET devices that include poly-poly capacitators in series with the gate terminal of each device. A pair of PMOS FET devices combine with the programmable devices to make up the latch. The latch circuit includes other FET devices that are switched on and off depending on whether the latch is being permanently programmed, temporarily written to, or reset. A NAND gate is provided such that a logical high output on the NAND gate allows the first programmable device to be temporarily programmed with a logical one and permanently programmed with a logical zero. A NOR gate is provided such that a logical high on the NOR gate allows the second programmable device to be temporarily programmed with a logical zero and permanently programmed with a logical one.

US Patent:

54500087, Sep 12, 1995

Filed:

Feb 22, 1994

Appl. No.:

8/200098

Inventors:

Brian K. Good - Greentown IN
Mark R. Keyse - Sharpsville IN

Assignee:

Delco Electronics Corp. - Kokomo IN

International Classification:

G01P 3488
G01P 3489
G01R 1508
H03L 500

US Classification:

324166

Abstract:

An adaptive loading circuit is provided for adaptively attenuating an alternating differential voltage that is produced by a magnetic sensor in response to the rotation of a wheel while maintaining noise immunity. The circuit includes an input for receiving an input differential voltage from the magnetic sensor via first and second input lines. A resistive divider network is included which has a resistive load serially connected to each of the first and second input lines and a plurality of adaptively selectable parallel resistive loads connected between the first and second input lines. Combinations of the parallel resistive loads are adaptively selected when the input differential voltage exceeds predetermined voltage thresholds so as to divide the input differential voltage into a selected portion thereof as an output differential voltage. In addition, the parallel resistive loads may be selectively switched out when the input differential voltage drops below a low voltage threshold. The output differential voltage is then processed so as to achieve rotational speed information about the wheel.