Manoj I Thadani

US Patent:

7814485, Oct 12, 2010

Filed:

Dec 7, 2004

Appl. No.:

11/007098

Inventors:

Bryan C Morgan - Leominster MA, US
Premanand Sakarda - Acton MA, US
Priya N Vaidya - Shrewsbury MA, US
Yi Ge - Westborough MA, US
Zhou Gao - Shanghai, CN
Manoj I Thadani - Marlborough MA, US
Canhui Yuan - Shanghai, CN

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 9/46
G06F 1/00

US Classification:

718100, 713323

Abstract:

A processing system may include a performance monitoring unit (PMU), a machine accessible medium, and a processor responsive to the PMU and the machine accessible medium. Instructions encoded in the machine accessible medium, when executed by the processor, may determine whether performance details for the processing system should be collected, based at least in part on a predetermined monitoring policy for the processing system. The instructions may generate performance data for the processing system, based at least in part on data obtained from the PMU. The instructions may determine whether the processing system should be reconfigured, based at least in part on the performance data and a power policy profile for the processing system. The instructions may automatically adjust power consumption of the processing system by using the PMU to reconfigure the processing system. Other embodiments are described and claimed.

US Patent:

20050108447, May 19, 2005

Filed:

Nov 17, 2003

Appl. No.:

10/716021

Inventors:

Manoj Thadani - Marlborough MA, US

International Classification:

G06F012/08

US Classification:

710022000, 711203000

Abstract:

An apparatus and a system, as well as a method and article, may operate to map, by an operating system, a range of virtual addresses to a range of physical addresses, wherein a subset of the range of virtual addresses is identity-mapped to a subset of the range of physical addresses. This range of addresses can then be used by heavy data transfer applications in conjunction with a DMA engine to transfer data between memories, or between memory and input/output devices.