Luke Zhang from Culver City, CA, age 28

Lawyers & Attorneys

Luke Zhang - Lawyer

view source

Office:

Zhong Lun Law Firm

Specialties:

PE/VC
M&A
Capital Markets
FDI/Cross Border M&A

ISLN:

921975135

Admitted:

2002

University:

Shanghai Jiaotong University, B.S.

Law School:

Fudan University School of Law, LL.M.

Name / Title

Company / Classification

Phones & Addresses

Luke Zhang
President

Rising Hope Education Foundation

3047 Crestablanca Dr, Pleasanton, CA 94566

Resumes

Associate Consultant

view source

Location:

Los Angeles, CA

Industry:

Management Consulting

Work:

Optimity Advisors Aug 2017 - Aug 2018
Consultant
Ggv Capital Mar 2016 - Apr 2017
Intern Analyst
Loeb.nyc Jun 2016 - Aug 2016
Summer Venture Analyst
Ggv Capital May 2015 - Jul 2015
Summer Analyst
Qiming Venture Partners Jun 2014 - Aug 2014
Summer Analyst

Education:

University of Southern California - Marshall School of Business 2015 - 2017
University of Southern California 2013 - 2017
Bachelors, Bachelor of Science, Economics, Mathematics University of Southern California - Marshall School of Business 2015 - 2016
Shanghai High School International Division 2004 - 2013

Skills:

Microsoft Excel
Microsoft Office
Microsoft Word
Powerpoint
Economics
Venture Capital
Market Analysis
Microsoft Powerpoint
Linear Algebra
Regression Models
Event Planning
Talk Show Host
Leadership
Entrepreneurship
Public Speaking
Health Economics
Marketing Strategy
Economic Policy
Financial Economics
Business Statistics
E Commerce
Start Up Ventures
Customer Service
Data Analysis

Interests:

Economic Empowerment
Education
Environment
Science and Technology
Disaster and Humanitarian Relief
Health

Languages:

English
Mandarin

Graphic Designer And Marketing Coordinator

view source

Location:

Berkeley, CA

Industry:

Marketing And Advertising

Work:

Oakland Roots Sports Club
Graphic Designer and Marketing Coordinator
Postmates Jul 2016 - Aug 2016
Delivery Driver
Don Dugout Student Store Jun 2015 - Jun 2016
Chief Marketing Officer
Deca Inc. Aug 2015 - Jun 2016
Vice President - Amador Valley Chapter
Lifetime Tennis Jun 2015 - Jun 2016
Youth Coach

Education:

University of California, Berkeley 2016 - 2020
University of California, Berkeley, Haas School of Business 2016 - 2020
Bachelors

Skills:

Adobe Photoshop
Adobe Illustrator
Indesign
Graphic Design
Writing
Microsoft Word
Microsoft Excel
Powerpoint
Keynote
Fundraising
Project Management
Presentations
Customer Service
Marketing
Social Media
Social Entrepreneurship
Financial Analysis
Public Relations
Public Speaking
Word Processing
Journalism

Languages:

English
Mandarin

Software Engineer

view source

Location:

Bethlehem, PA

Industry:

Information Technology And Services

Work:

Gilt.com Aug 2018 - Sep 2019
Software Engineer Ii
Latch Aug 2018 - Sep 2019
Software Engineer
Gilt Feb 2018 - Aug 2018
Software Engineer
Gilt.com Jun 2017 - Aug 2017
Software Engineer Internship
Alk, A Trimble Company Sep 2015 - Jan 2017
Software Engineer

Education:

Columbia University In the City of New York 2016 - 2017
Master of Science, Masters, Computer Science Lehigh University 2012 - 2015
Bachelors, Computer Science St. Stephen's Episcopal School 2008 - 2012
Middle School

Skills:

Java
C++
Javascript
Programming
Computer Science
Algorithms
Css
Vb.net
Machine Learning
C#
Html5
.Net
Web Applications
Monogame
Node.js
Unity
Tortoise Svn
Kotlin
Android Development
Scala
Http4S

Interests:

Urban Floor
Nrg Esports
Team Razer
Shopping District
Nine City Modern Asian Cuisine
Diplo
Duolingo
Community
Major Lazer
Shanghaiist Food and Drink
Xbox
50 Cent
Department Store
Talkativegeek
Andrew Luce
Campus Building
Big Quote
Windows 8 App Challenge
Smoothvideo (Svp)
Princeton Nj
Asus Republic of Gamers
Potatowilleatyou
Bird's Eye View
Starbucks
Wolfgang Gartner
Nassau Inn
Envato Tuts
Idownloadblog
Cdmd
Politician
Project Spark
God Gave Me Style
Interest
Restaurant
Fashion Trends
Hotel
Nintendo Console Gaming
Vineyard Vines
Mccollum
The Alliance
Stephen's Episcopal School Alumni
Saints Row
Nba Memes
Palmer Square
Karaoke
Fail Blog
Ask Me About My Zombie Disguise T Shirt
School
Movie
Skyrim Hd
Education
Science and Technology
Game Design
Technology Company
The Elder Scrolls Online
Shook
Clothing (Brand)
Nintendo Switch
Mysingapore
Nba 2K
Private School
Diablo
Princeton Alliance Church
Games/Toys
Grand Theft Auto 4 Codename
Other
Song
Broadcasting and Media Production Company
College and University
News and Media Website
Eminem
Pc Gamer
Sses Joke of the Week
Collision Course
Deadmau5
9Gag
Carpet and Flooring Store
Company
Häagen Dazs
Software Company
Religious Organization
Barack Obama
Gamespot
Incredibox
Local and Travel Website
Tennis Court
Esports Team
Saks Fifth Avenue
Retail Company
Musician/Band
Stephen's Tennis Academy
Egsc
Computers (Brand)
Sports Team
Bing
Surface
Entertainment Website
Movie Character
Johnny's Bagels and Deli
Video Game
Tv Network
Basketball
Utd Top Trader Competition
Society and Culture Website
Majestic Casual
Gta Iv
Media
Writer
Silk
Engineering Graduate Student Council
Shanghaiist
Maria Sharapova
Dream Big Live Tiny Co
Taiwan Lacrosse Association
Humble Bundle
The Third
App Page
Asian Cultural Society
Education Website
王力宏 Wang Leehom
Carlos Serrano
Computers and Internet Website
Food and Beverage Company
Glowforge
Columbia University
7 Fresh Fm
Nonprofit Organization
Website
Tim Duncan
Software
Athlete
Product/Service
Magazine
Learn Grow Earn
Non Governmental Organization (Ngo)
Awesome Eats Nyc
Amazon Video Games
Radio Station
Software Development
Journey From the East
Alk Technologies Inc
Media/News Company
Jackthreads
Minions

Languages:

Mandarin

Senior Director

view source

Location:

Santa Clara, CA

Industry:

Semiconductors

Work:

Tinoq
Senior Director
Marvell Semiconductor Sep 2012 - Apr 2017
Senior Development Manager
Marvell Semiconductor May 2007 - Sep 2012
Development Manager
Microsoft Jun 2000 - Mar 2007
Devoloper Community Support Lead

Education:

Nanjing University 1993 - 2000
Masters, Software Engineering

Skills:

.Net
Sharepoint
Software Development
Microsoft Sql Server
Software Engineering
Architectures
Enterprise Architecture
C#
Visual Studio
Architecture
Agile Methodologies
Project Management
Microsoft Exchange
Programming
Microsoft Technologies
Active Directory
Software Project Management
Software Design
Node.js
.Net Framework
Java
Node
Mongodb
Management
Amazon Web Services

Senior Staff Process Engineer

view source

Location:

Palo Alto, CA

Industry:

Semiconductors

Work:

Mattson Technology
Senior Staff Process Engineer
Sandisk/Western Digital Feb 2012 - Mar 2017
Process Integration Technologist
Dpix Feb 2007 - Sep 2011
Principal Process Etch Engineer
Applied Materials Oct 1997 - Jan 2007
Member of Technical Staff and Technology Leader, Etch Division
Mayden Technology Center Jun 2002 - Jun 2004
Member of Technical Staff

Education:

Auburn University 1989 - 1994
Doctorates, Doctor of Philosophy, Physics University of Science and Technology of China 1984 - 1987
Master of Science, Masters, Physics University of Science and Technology of China 1979 - 1984
Bachelors, Bachelor of Science, Physics

Skills:

Thin Films
Semiconductors
Design of Experiments
Pvd
Plasma Etch
Process Integration
Jmp
Sensors

Technical Specialist

view source

Location:

San Francisco, CA

Industry:

Computer Software

Work:

Lucid Motors
Technical Specialist
Rivian Automotive
Senior Embedded Software Engineer
Byton Jun 2018 - Aug 2019
Staff Software Engineer
Qualcomm Jun 1, 2011 - Jun 2018
Staff Software Engineer
Obigo Ab Sep 2009 - Apr 2011
Senior .Software Engineer and Team Leader

Education:

University of Illinois Springfield 2012 - 2015
Masters, Computer Science University of Illinois Springfield 2001 - 2003
Masters Wuhan University 1989 - 1993
Bachelors, Applied Physics

Skills:

Embedded Systems
Android
Software Development
Device Drivers
Symbian
Linux
C++
Embedded Software
Object Oriented Design
C
Mobile Devices
Java
Mobile Applications
Software Design
Bluetooth
Qnx
Operating Systems
Network Programming
Mobile Communications
Voip
Management
Wifi
Windows Ce

Languages:

English
Mandarin

Luke Zhang

view source

Luke Zhang

view source

Us Patents

Method And Apparatus For Etch Passivating And Etching A Substrate
view source
US Patent:

6489248, Dec 3, 2002
Filed:

Aug 23, 2001
Appl. No.:

09/938208
Inventors:

Luke Zhang - Santa Clara CA
Ruiping Wang - Fremont CA
Ida Ariani Adisaputro - San Jose CA
Kwang-Soo Kim - Mountain View CA
Assignee:

Applied Materials, Inc. - Santa Clara CA
International Classification:

H01L 2100
US Classification:

438714, 156345, 216 37, 216 67, 216 79, 438719, 438734, 438735
Abstract:

A substrate having a patterned mask and exposed openings is provided in a process chamber having process electrodes. In a plasma ignition stage, a process gas is provided in the process chamber and is energized by maintaining the process electrodes at a plasma ignition bias power level. In an etch-passivating stage, an etch-passivating material is formed on at least portions of the substrate by maintaining the process electrodes at an etch-passivating bias power level. In an etching stage, the exposed openings on the substrate are etched by maintaining the process electrodes at an etching bias power level.

Method And Apparatus For Etching A Substrate With Reduced Microloading
view source
US Patent:

62913573, Sep 18, 2001
Filed:

Oct 6, 1999
Appl. No.:

9/414329
Inventors:

Luke Zhang - Santa Clara CA
Ruiping Wang - Fremont CA
Ida Ariani Adisaputro - San Jose CA
Kwang-Soo Kim - Mountain View CA
Assignee:

Applied Materials, Inc. - Santa Clara CA
International Classification:

H01L 2100
US Classification:

438714
Abstract:

A substrate 20 is placed in a process zone 115 of a process chamber 110, process gas is introduced into the process zone 115, and an energized gas is formed in the process zone 115. First process conditions are set to form etch-passivating deposits onto a surface 22 of the substrate 20. Second process conditions are set to etch the surface 22 of the substrate 20. The etch-passivating deposits formed before the etching process improve etching uniformity and reduce etch-rate microloading.

Vertical Bit Line Non-Volatile Memory Systems And Methods Of Fabrication
view source
US Patent:

20170098685, Apr 6, 2017
Filed:

Dec 15, 2016
Appl. No.:

15/379991
Inventors:

- Plano TX, US
Steve Radigan - Fremont CA, US
Vance Dunton - San Jose CA, US
Natalie Nguyen - Milpitas CA, US
Luke Zhang - Milpitas CA, US
Assignee:

SanDisk Technologies LLC - Plano TX
International Classification:

H01L 27/24
H01L 45/00
Abstract:

Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. The gates overlie the global bit lines with one or more insulating layers therebetween to provide adequate isolation between the gates and the global bit lines. Processes for fabricating the vertical TFT select devices utilize a gate dielectric and optional dielectric bases to provide isolation between the gates and bit lines.

Vertical Bit Line Non-Volatile Memory Systems And Methods Of Fabrication
view source
US Patent:

20160064222, Mar 3, 2016
Filed:

Nov 11, 2015
Appl. No.:

14/938637
Inventors:

- Milpitas CA, US
Steve Radigan - Fremont CA, US
Vance Dunton - San Jose CA, US
Natalie Nguyen - Milpitas CA, US
Luke Zhang - Milpitas CA, US
Assignee:

SANDISK 3D LLC - Milpitas CA
International Classification:

H01L 21/28
H01L 27/24
Abstract:

Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. The gates overlie the global bit lines with one or more insulating layers therebetween to provide adequate isolation between the gates and the global bit lines. Processes for fabricating the vertical TFT select devices utilize a gate dielectric and optional dielectric bases to provide isolation between the gates and bit lines.

Vertical Bit Line Non-Volatile Memory Systems And Methods Of Fabrication
view source
US Patent:

20140248763, Sep 4, 2014
Filed:

Mar 4, 2014
Appl. No.:

14/196904
Inventors:

- Milpitas CA, US
Steve Radigan - Fremont CA, US
Vance Dunton - San Jose CA, US
Natalie Nguyen - Milpitas CA, US
Luke Zhang - Milpitas CA, US
Assignee:

SanDisk 3D LLC - Milpitas CA
International Classification:

H01L 21/28
US Classification:

438591
Abstract:

Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. The gates overlie the global bit lines with one or more insulating layers therebetween to provide adequate isolation between the gates and the global bit lines. Processes for fabricating the vertical TFT select devices utilize a gate dielectric and optional dielectric bases to provide isolation between the gates and bit lines.