Luis R Navarro

US Patent:

8183504, May 22, 2012

Filed:

Mar 27, 2006

Appl. No.:

11/392974

Inventors:

Wayne Montoya - Redwood City CA, US
Luis A. Navarro - San Carlos CA, US
Cecilia A. Walsh - Los Altos CA, US
Adrian P. Mikolajczak - Los Altos CA, US

Assignee:

Tyco Electronics Corporation - Middletown PA

International Classification:

H05B 1/02

US Classification:

219511, 219505, 219494, 219504

Abstract:

A surface-mountable electrical circuit protection device includes layers defining a first PPTC resistive element, a second PPTC resistive element, and at least one heat-generating electrical component such as a planar zener diode chip positioned between, and in thermal contact with, the first and second PPTC elements, such that an electrical current above a threshold level passing through the component causes the component to heat, the heat being transferred to the PPTC resistive elements and tripping at least one, and preferably both of the first or second PPTC elements to a high resistance state. A series of edge-formed terminal electrodes enable surface-mount connection of the first and second PPTC elements and the electrical component to an electrical circuit substrate, such as a printed circuit board. A method for making the device is also disclosed.

US Patent:

8400255, Mar 19, 2013

Filed:

Jul 17, 2009

Appl. No.:

12/460349

Inventors:

Luis A. Navarro - San Carlos CA, US
Josh H. Golden - Santa Cruz CA, US
Martyn A. Matthiesen - Fremont CA, US

Assignee:

Tyco Electronics Corporation - Berwyn PA

International Classification:

H01C 7/13

US Classification:

338 22R

Abstract:

A method for producing a surface mount device includes providing a plurality of layers including a B-staged top layer and bottom layer, and a C-staged middle layer with an opening. A core device is inserted into the openings, and then the top and bottom layers are placed over and under, respectively, the middle layer. The layers are cured until the layers become C-staged. The core device is substantially surrounded by an oxygen-barrier material with an oxygen permeability of less than approximately 0. 4 cm3mm/m2atmday.

US Patent:

8525635, Sep 3, 2013

Filed:

Jul 17, 2009

Appl. No.:

12/460349

Inventors:

Luis A. Navarro - San Carlos CA, US
Josh H. Golden - Santa Cruz CA, US
Martyn A. Matthiesen - Fremont CA, US

Assignee:

Tyco Electronics Corporation - Berwyn PA

International Classification:

H01C 7/13

US Classification:

338 22R

Abstract:

A method for producing a surface mount device includes providing a plurality of layers including a B-staged top layer and bottom layer, and a C-staged middle layer with an opening. A core device is inserted into the openings, and then the top and bottom layers are placed over and under, respectively, the middle layer. The layers are cured until the layers become C-staged. The core device is substantially surrounded by an oxygen-barrier material with an oxygen permeability of less than approximately 0. 4 cm3mm/m2atmday.

US Patent:

20120227229, Sep 13, 2012

Filed:

May 22, 2012

Appl. No.:

13/477538

Inventors:

Wayne Montoya - Redwood City CA, US
Luis A. Navarro - San Carlos CA, US
Cecilia A. Walsh - Los Altos CA, US
Adrian P. Mikolajczak - Los Altos CA, US

International Classification:

H01C 17/28
H01L 21/02
H01C 17/00

US Classification:

29 2501, 29612

Abstract:

A surface-mountable electrical circuit protection device includes layers defining a first PPTC resistive element, a second PPTC resistive element, and at least one heat-generating electrical component such as a planar zener diode chip positioned between, and in thermal contact with, the first and second PPTC elements, such that an electrical current above a threshold level passing through the component causes the component to heat, the heat being transferred to the PPTC resistive elements and tripping at least one, and preferably both of the first or second PPTC elements to a high resistance state. A series of edge-formed terminal electrodes enable surface-mount connection of the first and second PPTC elements and the electrical component to an electrical circuit substrate, such as a printed circuit board. A method for making the device is also disclosed.

US Patent:

20120307467, Dec 6, 2012

Filed:

Jun 3, 2011

Appl. No.:

13/153368

Inventors:

Luis A. Navarro - San Carlos CA, US
Mario G. Sepulveda - Newark CA, US
Patrick J. Hibbs - Murphy TX, US
Martin G. Pineda - Fremont CA, US
Martyn A. Matthiesen - Fremont CA, US
Anthony Vranicar - Santa Clara CA, US
Dong Yu - Fremont CA, US

International Classification:

H05K 7/10
B32B 38/10

US Classification:

361767, 156247, 361808

Abstract:

An electrical component includes a plurality of core devices arranged within a housing so as to be electrically isolated from one another. For each of the plurality of core devices, a first contact pad and a second contact pad is formed on an outside surface of the housing. The first and second contact pads are electrically connected to a respective core device of the plurality of core devices.

US Patent:

58016120, Sep 1, 1998

Filed:

Aug 13, 1997

Appl. No.:

8/910865

Inventors:

Daniel A. Chandler - Menlo Park CA
Luis A. Navarro - Fremont CA
Edward F. Chu - Sunnyvale CA

Assignee:

Raychem Corporation - Menlo Park CA

International Classification:

H01C 710

US Classification:

338 22R

Abstract:

A circuit protection device for protecting batteries is formed from a resistive element composed of a PTC conductive polymer composition and two electrodes. The device has a resistive element thickness of 0. 025 to 0. 20 mm; a crosslinking level equivalent to 1 to 20 Mrads; a surface area of at most 120 mm. sup. 2 ; a resistance at 20. degree. C. , R. sub. 20, of at most 0. 030 ohm; and a resistivity at 20. degree. C. ,. rho. sub. 20, of at most 2. 0 ohm-cm. Devices of the invention are sufficiently small to be easily inserted into an assembly comprising a battery, particularly a rechargeable battery, and the device. Such assemblies are used for powering portable electronic equipment such as cellular telephones.