Linda J Marquez

US Patent:

20130323933, Dec 5, 2013

Filed:

May 28, 2013

Appl. No.:

13/903258

Inventors:

Rao V. Annapragada - Fremont CA, US
Cecilia Laura Quinteros - Santa Clara CA, US
Linda Nancy Marquez - San Jose CA, US
Steven M. Kennedy - Union City CA, US

International Classification:

H01L 21/3065

US Classification:

438710

Abstract:

Methods for forming microlenses on a semiconductor substrate are provided. An inductively coupled plasma etch process using a process gas that includes a mixture of CFand CHFcan be used to modify the lens shape of a plurality of microlens objects located on a semiconductor substrate to meet microlens specifications in terms of curvature, height, length, shape, and/or distance between adjacent microlens objects on the substrate. The inductively coupled plasma process can be performed in an inductively coupled plasma processing apparatus that includes a grounded Faraday shield to prevent any capacitive coupling during the plasma etching process to reduce sputtering of the microlens surface.

US Patent:

61331538, Oct 17, 2000

Filed:

Mar 30, 1998

Appl. No.:

9/052276

Inventors:

Linda N. Marquez - Fremont CA
Janet M. Flanner - Union City CA

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 213065

US Classification:

438706

Abstract:

A plasma, formed from a mixture of C. sub. 4 F. sub. 8 and CH. sub. 2 F. sub. 2, is used to etch a self-aligned contact, the self-aligned contact being an opening in the oxide layer, the opening being aligned with an opening in an underlying nitride layer and extending to a substrate underlying the nitride. The mixture of C. sub. 4 F. sub. 8 and CH. sub. 2 F. sub. 2 provides a high ratio of oxide etch rate to nitride etch rate so that the etching is completed without substantially damaging the nitride layer. For thicker oxide layers a preliminary etch step using C. sub. 2 F. sub. 6 and C. sub. 2 HF. sub. 5 may be performed prior to using the mixture of C. sub. 4 F. sub. 8 and CH. sub. 2 F. sub. 2.

US Patent:

62287745, May 8, 2001

Filed:

Dec 29, 1998

Appl. No.:

9/222551

Inventors:

Linda N. Marquez - Fremont CA

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 2100

US Classification:

438710

Abstract:

The invention relates to a method of etching a feature in an oxide layer using a photoresist mask, the oxide layer being disposed above an underlying layer of a substrate inside an inductively-coupled plasma processing chamber. The method includes flowing an etchant source gas that includes CH. sub. 2 F. sub. 2,C. sub. 4 F. sub. 8 and O. sub. 2 or C. sub. 3 H. sub. 3 F. sub. 5,C. sub. 4 F. sub. 8 and O. sub. 2 into the plasma processing chamber. The method further includes forming a plasma from the etchant source gas. The method additionally includes etching through the oxide layer of the substrate with the plasma, wherein the etching substantially stops on the underlying layer, the underlying being one of a silicon layer, a tungsten-based layer or a TiN layer.

US Patent:

57834962, Jul 21, 1998

Filed:

Mar 29, 1996

Appl. No.:

8/623526

Inventors:

Janet M. Flanner - Union City CA
Prashant Gadgil - Fremont CA
Linda N. Marquez - Fremont CA
Adrian Doe - Pleasanton CA
Joel M. Cook - Pleasanton CA

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 2100

US Classification:

438743

Abstract:

A method in a plasma processing chamber for fabricating a semiconductor device having a self-aligned contact. The method includes the step of providing a wafer having a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above a polysilicon layer, and an oxide layer disposed above the nitride layer. The method further includes the step of etching in a first etching step partially through the oxide layer of the layer stack with a first chemistry and a first set of process parameters. In this first etching step, the first chemistry comprises essentially of CHF. sub. 3 and C. sub. 2 HF. sub. 5. The method also includes the step of etching the oxide layer in a second etching step through to the substrate with a second chemistry comprising CHF. sub. 3 and C. sub. 2 HF. sub. 5 and a second set of process parameters. The second set of process parameters is different from the first set of process parameters and represents a set of parameters for etching the oxide layer with a higher oxide-to-nitride selectivity than the oxide-to-nitride selectivity achieved in the first etching step.

US Patent:

6165910, Dec 26, 2000

Filed:

Dec 29, 1997

Appl. No.:

8/998954

Inventors:

Janet M. Flanner - Union City CA
Linda N. Marquez - Fremont CA
Joel M. Cook - Pleasanton CA
Ian J. Morey - San Jose CA

Assignee:

Lam Research Corporation - Fremont CA

International Classification:

H01L 2100

US Classification:

438743

Abstract:

In a plasma processing chamber, a method for etching through a selected portion of an oxide layer of a wafer's layer stack to create a self-aligned contact opening is described. The wafer stack includes a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above said polysilicon layer and the oxide layer disposed above the nitride layer. The method for etching includes etching through the oxide layer of the layer stack with a chemistry and a set of process parameters. The chemistry essentially includes C. sub. 2 HF. sub. 5 and CH. sub. 2 F. sub. 2 and the set of process parameters facilitate etching through the oxide layer without creating a spiked etch and etching the oxide layer through to the substrate without substantially damaging the nitride layer.

US Patent:

20160181116, Jun 23, 2016

Filed:

Dec 18, 2014

Appl. No.:

14/576020

Inventors:

- Fremont CA, US
Ivelin Angelov - Sunnyvale CA, US
Linda Marquez - San Jose CA, US
Faisal Yaqoob - Fremont CA, US
Pilyeon Park - Santa Clara CA, US
Helen H. Zhu - Fremont CA, US
Bayu Atmaja Thedjoisworo - San Jose CA, US
Zhao Li - Santa Clara CA, US

International Classification:

H01L 21/311
H01L 21/67
C09K 13/00

Abstract:

Methods of selectively etching silicon nitride are provided. Silicon nitride layers are exposed to a fluorinating gas and nitric oxide (NO), which may be formed by reacting nitrous oxide (NO) and oxygen (O) in a plasma. Methods also include defluorinating the substrate prior to turning off the plasma to increase etch selectivity of silicon nitride.

US Patent:

20160064212, Mar 3, 2016

Filed:

Dec 19, 2014

Appl. No.:

14/577977

Inventors:

- Fremont CA, US
Helen Zhu - Fremont CA, US
Linda Marquez - San Jose CA, US
Joon Park - Dublin CA, US

International Classification:

H01L 21/02
H01J 37/32

Abstract:

Method and apparatus for cleaning a substrate having a plurality of high-aspect ratio openings are disclosed. A substrate can be provided in a plasma processing chamber, where the substrate includes the plurality of high-aspect ratio openings, the plurality of high-aspect ratio openings are defined by vertical structures having alternating layers of oxide and nitride or alternating layers of oxide and polysilicon. The substrate can include a silicon oxide layer over a damaged or amorphous silicon layer in the high-aspect ratio openings. To remove the silicon oxide layer, a bias power can be applied in the plasma processing chamber at a low pressure, and a fluorine-based species can be used to etch the silicon oxide layer. To remove the underlying damaged or amorphous silicon layer, a source power and a bias power can be applied in the plasma processing chamber, and a hydrogen-based species can be used to etch the damaged or amorphous silicon layer.