Loucas Tsakalakos - Niskayuna NY, US Bastiaan A. Korevaar - Schenectady NY, US Joleyn E. Balch - Schaghticoke NY, US Jody A. Fronheiser - Selkirk NY, US Reed R. Corderman - Niskayuna NY, US Fred Sharifi - Niskayuna NY, US Vidya Ramaswamy - Niskayuna NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
C01B 31/00 C01B 31/02
US Classification:
423445R, 977891, 977890, 977888, 977893, 4234473
Abstract:
A method for forming an array of elongated nanostructures, includes in one embodiment, providing a substrate, providing a template having a plurality of pores on the substrate, and removing portions of the substrate under the plurality of pores of the template to form a plurality of cavities. A catalyst is provided in the plurality of cavities in the substrate, and the pores of the template are widened to expose the substrate around the catalyst so that the catalyst is spaced from the sides of the plurality of pores of the template. A plurality of elongated nanostructures is grown from the catalyst spaced from the sides of the pores of the template.
Gated Nanorod Field Emitter Structures And Associated Methods Of Fabrication
Heather Diane Hudspeth - Clifton Park NY, US Ji Ung Lee - Niskayuna NY, US Reed Roeder Corderman - Niskayuna NY, US Anping Zhang - Niskayuna NY, US Renee Bushey Rohling - Burnt Hills NY, US Lauraine Denault - Nassau NY, US Joleyn Eileen Balch - Clifton Park NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H01J 1/62
US Classification:
313495, 313309
Abstract:
The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc. ) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
A photovoltaic device that includes a substrate and a nanowall structure disposed on the substrate surface. The device also includes at least one layer conformally deposited over the nanowall structure. The conformal layer(s) is at least a portion of a photoactive junction. A method for making a photovoltaic device includes generating a nanowall structure on a substrate surface and conformally depositing at least one layer over the nanowall structure thereby forming at least one photoactive junction. A solar panel includes at least one photovoltaic device based on a nanowall structure. The solar panel isolates such devices from its surrounding atmospheric environment and permits the generation of electrical power. Optoelectronic device may also incorporate a photovoltaic device based on a nanowall structure.
Nanostructures, Methods Of Depositing Nanostructures And Devices Incorporating The Same
Loucas Tsakalakos - Niskayuna NY, US Joleyn Eileen Balch - Schaghticoke NY, US
Assignee:
General Electric Company - Niskayuna NY
International Classification:
H01L 21/20 H01L 21/36
US Classification:
438478, 977892
Abstract:
A method for depositing nanowires is disclosed. The method includes depositing multiple nanowires onto a surface of a liquid. The method also includes partially compressing the nanowires. The method also includes dipping a substrate into the liquid. The method further includes pulling the substrate out of the liquid at a controlled speed. The method also includes transferring the nanowires onto the substrate parallel to a direction of the pulling.
Membrane Assemblies And Methods Of Making And Using The Same
Anping Zhang - Rexford NY, US Azar Alizadeh - Wilton NY, US Joleyn Eileen Balch - Schaghticoke NY, US Rui Chen - Clifton Park NY, US Anthony John Murray - Lebanon NJ, US Vicki Herzl Watkins - Alplaus NY, US Oliver Charles Boomhower - Waterford NY, US Reed Roeder Corderman - Niskayuna NY, US Peter Paul Gipp - Schenectady NY, US
A method of making a membrane assembly is provided. The method comprises forming an inorganic membrane layer disposed on a substrate, and forming a plurality of macropores in the substrate at least in part using anodization. Further, a membrane assembly is provided. The membrane assembly comprises a filtering membrane that is coupled to an anodized substrate comprising a plurality of macropores.
Gated Nanorod Field Emitter Structures And Associated Methods Of Fabrication
Heather Hudspeth - Clifton Park NY, US Ji Lee - Niskayuna NY, US Reed Corderman - Niskayuna NY, US Anping Zhang - Niskayuna NY, US Renee Rohling - Burnt Hills NY, US Lauraine Denault - Nassau NY, US Joleyn Balch - Clifton Park NY, US
International Classification:
H01J 1/02 B05D 5/12 H01J 9/04
US Classification:
313309000, 313351000, 445050000, 427077000
Abstract:
The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
Anping Zhang - Niskayuna NY, US Joleyn Balch - Clifton Park NY, US Loucas Tsakalakos - Niskayuna NY, US Heather Hudspeth - Clifton Park NY, US Reed Corderman - Niskayuna NY, US
In a method of making a field emitter, at least one post () is formed on a semiconductor substrate (). The post () extends upwardly from the substrate (). The post () is monocrystalline with the substrate (). A dielectric layer () is deposited on the substrate (). The dielectric layer () defines a via () therethrough about the post (). A conductive gate layer () is applied to the dielectric layer () so that the conductive gate layer () defines an opening that is juxtaposed with the via (). At least one nanostructure () is grown upwardly from the top surface of the post ().
Loucas Tsakalakos - Niskayuna NY, US Bastiaan Arie Korevaar - Schenectady NY, US Joleyn Eileen Balch - Schaghticoke NY, US Jody Fronheiser - Selkirk NY, US Bo Li - Clifton Park NY, US Anis Zribi - Colorado Springs CO, US
Disclosed herein is a nanodevice. Disclosed herein too is a method of manufacturing a nanodevice. In one embodiment the nanodevice includes a first substrate; a second substrate; a nanowire; the nanowire contacting the first substrate and the second substrate; the nanowire comprising a metal, a semi-conductor or a combination thereof.