John M Sheplock

US Patent:

6973528, Dec 6, 2005

Filed:

May 22, 2002

Appl. No.:

10/153041

Inventors:

Timothy C. Bronson - Vestal NY, US
Glenn D. Gilda - Binghamton NY, US
John M. Sheplock - Raleigh NC, US
Phillip G. Williams - Owego NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F013/00

US Classification:

710310, 710311

Abstract:

To prevent data performance impacts when dealing with target devices that can only transfer data for a limited number of bytes before disconnecting, the invention implements a short term data cache on the bridge. Using this feature, the bridge will cache additional data beyond a predetermined quantity of data following a disconnect with the requesting device. As such, the bridge may continue to prefetch additional data up to an amount specified by a prefetch read byte count and return the additional data should the requesting device request additional data resuming at the point of disconnect. However, the bridge will discard the additional data when at least one of the following occurs: a) the requesting device disconnects data transfer, and b) a further READ request that resumes at the point of disconnect is not received within a predetermined time.

US Patent:

6985990, Jan 10, 2006

Filed:

Mar 29, 2002

Appl. No.:

10/114020

Inventors:

Timothy C. Bronson - Vestal NY, US
John M. Sheplock - Raleigh NC, US
Phillip G. Williams - Owego NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 13/36

US Classification:

710306, 710311, 710312, 710 8, 710 9, 710 10

Abstract:

Private devices are implemented on the secondary interface of PCI bridge by re-routing the activation of device select signals (IDSEL) during the address phase of a Type 0 configuration operation on the secondary bus in response to a Type 1 configuration operation on its primary bus. Under control of a mask register and device select reroute circuit, if a configuration command on the primary interface attempts to activate the IDSEL line associated with one of the private, or reroute, devices on the secondary interface, a different IDSEL is activated to select a monitoring device on the secondary interface.

US Patent:

8635488, Jan 21, 2014

Filed:

Nov 8, 2011

Appl. No.:

13/291874

Inventors:

Jerry D. Ackaret - Beaverton OR, US
Justin P. Bandholz - Cary NC, US
Brian E. Bigelow - Apex NC, US
Joseph E. Bolan - Cary NC, US
Kevin M. Cash - Cary NC, US
David L. Cowell - Garner NC, US
Martin J. Crippen - Apex NC, US
Christopher L. Durham - Research Triangle Park NC, US
Jeffery M. Franke - Apex NC, US
James E. Hughes - Apex NC, US
David J. Jensen - Raleigh NC, US
John K. Langgood - Cary NC, US
Bay Van Nguyen - Durham NC, US
James A. O'Connor - Ulster Park NY, US
Derek Robertson - Durham NC, US
John M. Sheplock - Raleigh NC, US
Wilson E. Smith - Bahama NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 11/00

US Classification:

714 2, 714 1

Abstract:

A method and circuit for implementing an enhanced availability personality card for a chassis computer system, and a design structure on which the subject circuit resides are provided. The personality card includes a first erasable programmable read only memory (EPROM) and a second EPROM, each EPROM storing Vital Product Data (VPD) and a first temperature sensor and a second temperature sensor sensing temperature. A primary bidirectional bus and a redundant bidirectional bus are respectively connected between the first EPROM and the first temperature sensor and the second EPROM and the second temperature sensor, and a pair of chassis management modules. Each chassis management module includes a switch connected to both the primary bidirectional bus and the redundant bidirectional bus providing redundant paths, enabling continued function with failure of any critical personality card component.

US Patent:

20030188076, Oct 2, 2003

Filed:

Mar 29, 2002

Appl. No.:

10/113299

Inventors:

Timothy Bronson - Vestal NY, US
Stefan Jackowski - Endicott NY, US
John Sheplock - Raleigh NC, US
Phillip Williams - Owego NY, US

Assignee:

International Business Machines - Armonk NY

International Classification:

G06F013/36

US Classification:

710/311000, 710/313000

Abstract:

An opaque memory region for a bridge of an I/O adapter. The opaque memory region is inaccessible to memory transactions which traverse the bridge either from a primary bus to secondary bus or secondary bus to primary bus. As a result, memory transactions which target the opaque memory region are ignored by the bridge, allowing for the same address to exist on both sides of the bridge with different data stored in each. The implementation of the opaque memory region provides a means to complete memory transactions within I/O adapter subsystem memory, hence, relieving host computer system memory resources. In addition, a number of I/O adapters can be used in a host computer system where the host and all the I/O devices use some of the same memory addresses.