John Fuad Hanna

US Patent:

7893676, Feb 22, 2011

Filed:

Jul 20, 2006

Appl. No.:

11/490220

Inventors:

John E. Hanna - Sun Lakes AZ, US

Assignee:

Enpirion, Inc. - Bridgewater NJ

International Classification:

H03K 17/30

US Classification:

323284, 326 83, 327109

Abstract:

A driver for a switch, a related method of driving the switch, and a power converter employing the same. In one embodiment, the driver includes switching circuitry having a driver switch referenced to a voltage level and configured to provide a drive signal to a control terminal of a power switch referenced to another voltage level and subject to a control voltage limit. The driver also includes a comparator configured to change a state of the driver switch when a voltage at the control terminal passes a threshold voltage.

US Patent:

20040212527, Oct 28, 2004

Filed:

Apr 22, 2003

Appl. No.:

10/420090

Inventors:

John Hanna - Gilbert AZ, US

International Classification:

H03M001/12

US Classification:

341/155000, 341/122000

Abstract:

Systems and methods are described for improving the accuracy of A/D converters. The method includes sampling an input voltage and a reference voltage substantially simultaneously, transmitting both the sampled input voltage and the sampled reference voltage to an analog-to-digital converter, and producing a digital signal based on the sampled reference voltage and the sampled input voltage. The apparatus includes first and second samplers coupled to receive a reference voltage and an input voltage and operating to sample the voltages substantially simultaneously, and an A/D converter, which receives input from the first and second samplers.

US Patent:

46896511, Aug 25, 1987

Filed:

Jul 29, 1985

Appl. No.:

6/760021

Inventors:

John E. Hanna - Mesa AZ
Ira Miller - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H01L 2972
H01L 2990
H03K 508
H03K 326

US Classification:

357 36

Abstract:

A low voltage clamp circuit comprises a transistor and semiconductor junction impedance circuitry for establishing an impedance such that the magnitude of a voltage applied across the emitter and collector of the transistor is clamped at a value that is less than the reverse breakdown voltage of the collector-to-emitter of the transistor if its base is shorted to the collector. The clamp circuit is suited to be manufactured in monolithic integrated circuit form and can be used to protect integrated bipolar transistors from having the reverse breakdown voltage of their emitter-base junctions exceeded.

US Patent:

51824760, Jan 26, 1993

Filed:

Jul 29, 1991

Appl. No.:

7/737282

Inventors:

John E. Hanna - Mesa AZ
Behrooz Abdi - Chandler AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06G 710
H03B 100

US Classification:

307491

Abstract:

An offset cancellation circuit corrects DC offset appearing at the input of a comparator circuit. The first input of a summing junction receives an input signal containing DC offset. The output of the summing junction drives the input of the comparator and a feedback amplifier, the latter of which returns to the second input of the summing junction. Any DC offset is processed through the feedback amplifier where it subtracts from the input signal for providing zero DC offset at the input of the comparator.

US Patent:

40428869, Aug 16, 1977

Filed:

Aug 18, 1975

Appl. No.:

5/605492

Inventors:

John Edward Hanna - Scottsdale AZ

Assignee:

Motorola, Inc. - Chicago IL

International Classification:

H03F 345

US Classification:

330 23

Abstract:

An amplifier configuration is disclosed which utilizes a resistive, positive feedback network to develop a high input impedance. The amplifier, which is suitable for manufacture in monolithic integrated circuit form, includes a pair of differential transistors which are coupled to a current supply that provides a current having a predetermined temperature coefficient. A resistor, which is connected between the emitters of the differential transistors, develops either a temperature stable offset voltage or an offset voltage having a desired temperature coefficient in response to the current. A negative feedback circuit facilitates control of the bias voltages for the pair of differential transistors. Temperature stable quiescent input and output voltage levels are derived from the offset voltage through the feedback network.

US Patent:

40258700, May 24, 1977

Filed:

Nov 17, 1975

Appl. No.:

5/632436

Inventors:

John E. Hanna - Scottsdale AZ

Assignee:

Motorola, Inc. - Chicago IL

International Classification:

H03F 134

US Classification:

330 20

Abstract:

The disclosed amplifier circuit includes a common base transistor, a turn-around device and a driver transistor, which is connected to a filter. An emitter follower stage is also connected to the filter. The turn-around device is connected between the common base and driver transistors. A diode connected transistor is utilized for compensating for the nonlinearity of the common base transistor. A first negative feedback path is provided between the driver and common base transistors to stabilize bias levels, increase amplifier output impedance and reduce distortion. A frequency compensation capacitor is connected to the driver transistor and a second negative feedback path is provided from the output of the emitter follower stage to the driver transistor. The second negative feedback path facilitates rapid discharge of the capacitor and driver transistor, a high slew rate and compensates for the nonlinearity of the emitter follower.

US Patent:

40913210, May 23, 1978

Filed:

Dec 8, 1976

Appl. No.:

5/748580

Inventors:

John Edward Hanna - Scottsdale AZ

Assignee:

Motorola Inc. - Schaumburg IL

International Classification:

G05F 308

US Classification:

323 19

Abstract:

A temperature compensated low voltage reference that produces an output voltage less than the silicon band-gap voltage. The low voltage reference includes at least a first and a second transistor for providing a voltage independent of variations in the collector power supply and at least a third transistor for developing a voltage that is a fractional value of the base-to-emitter voltage drop of a transistor. The at least a third transistor for developing is coupled with the at least a first and a second transistor for providing. The low voltage reference also includes an output transistor for providing an output voltage. The output transistor is controlled by the voltage provided by the at least a first and a second transistor for providing so that the output voltage is essentially insensitive to temperature variations and is a lower value than the silicon band-gap voltage.

US Patent:

49964984, Feb 26, 1991

Filed:

Jan 3, 1990

Appl. No.:

7/460481

Inventors:

John E. Hanna - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03F 345

US Classification:

330258

Abstract:

A filter cell having common mode compensation for use in a differential integrating filter includes a transconductance amplifier that comprises a pair of differentially connected transistors the bases of which are coupled to respective inputs of the filter cell and whose emitters are interconnected to a current sinking transistor while the collectors are coupled via respective output circuitry to first and second outputs of the filter cell. Circuitry is provided to set the common voltage levels at the first and second outputs of the comprising a pair of resistors commonly connected at a circuit node that is a virtual ground for differential signals and the first and second filter cell outputs respectively. The circuit node is also coupled to the base of the current sinking transistor to thereby for a common mode closed loop in conjunction with a current supply that is also coupled to the circuit node. Common mode compensation to inhibit loop instability is provided by a pair of capacitors coupled in series between the collectors of differentially connected transistors and having the junction therebetween connected to the base of the current sinking transistor.

Address:

297 Cresta Vis Way, San Jose, CA 95119

VIN:

3VWAL8AJ9AM021524

Make:

VOLKSWAGEN

Model:

JETTA

Year:

2010

Address:

PO Box 7689, Laguna Niguel, CA 92607

VIN:

4JGCB65E48A074117

Make:

MERCEDES

Model:

R350V4

Year:

2008