Jenny Lian

US Patent:

7001781, Feb 21, 2006

Filed:

Sep 26, 2003

Appl. No.:

10/672306

Inventors:

Jenny Lian - New York NY, US
Ulrich Egger - Kanagawa-ken, JP
Haoren Zhuang - Tokyo-to, JP

Assignee:

Infineon Technologies AG - Munich

International Classification:

H01L 21/475

US Classification:

438 3, 438396

Abstract:

A method for fabricating a device and a device, such as a ferroelectric capacitor, having a substrate, a contact plug through the substrate, a first barrier layer on the substrate, a first electrode on the first barrier layer, a dielectric layer on the first electrode, and a second electrode on the dielectric layer, comprises etching the second electrode and the dielectric layer of the device using a first hardmask, to shape the second electrode and the dielectric layer. The first hardmask is then removed and one or more encapsulating layers are applied to the second electrode and the dielectric layer. A further hardmask is applied to the one or more encapsulating layers. The first electrode is then etched according to the second hardmask down to the first barrier layer and the second hardmask is then removed from the one or more encapsulating layers.

US Patent:

7316980, Jan 8, 2008

Filed:

Oct 2, 2003

Appl. No.:

10/678758

Inventors:

Haoren Zhuang - New York NY, US
Ulrich Egger - Kanagawa-ken, JP
Rainer Bruchhaus - Munich, DE
Karl Hornik - Kanagawa-ken, JP
Jenny Lian - New York NY, US
Stefan Gernhardt - Kanagawa-ken, JP

Assignee:

Infineon Technologies AG - Munich

International Classification:

H01L 21/302

US Classification:

438720, 438629, 438633, 438710

Abstract:

Ferrocapacitors having a vertical structure are formed by a process in which a ferroelectric layer is deposited over an insulator. In a first etching stage, the ferroelectric material is etched to form openings in it, leaving the insulating layer substantially intact. Then a conductive layer is deposited into the openings formed in the ferroelectric layer, forming electrodes on the sides of the openings. Further etching is performed to form gaps in the AlOlayer, for making connections to conductive elements beneath it. Thus, by the time the second etching step is performed; there are already electrodes overlying the sides of the ferroelectric material, without insulating fences in between.

US Patent:

20050084984, Apr 21, 2005

Filed:

Oct 2, 2003

Appl. No.:

10/678952

Inventors:

Haoren Zhuang - New York NY, US
Rainer Bruchhaus - Kanagawa-ken, JP
Ulrich Egger - Kanagawa-ken, JP
Jenny Lian - New York NY, US
Nicolas Nagel - Kanagawa-ken, JP

International Classification:

H01L031/119

US Classification:

438003000

Abstract:

A vertical capacitor of an FeRAM device is formed by depositing conductive material and etching it to form electrodes, which are located over openings in an insulating layer so that they are electrically connected to lower levels of the structure. A layer of ferroelectric material is formed on the sides of the electrodes, and etched to a desired, uniform thickness. Conductive material is deposited over the ferroelectric material to form a uniform surface onto which another insulating layer can be deposited. Since this process does not include etching of an insulating layer at a time between the formation of the electrodes and the deposition of the ferroelectric material, no fences of insulating material are formed between them. The geometry can be accurately controlled, to give uniform electric fields and reliable operating parameters.