Jay M Robinson

US Patent:

6414868, Jul 2, 2002

Filed:

Jun 7, 1999

Appl. No.:

09/327058

Inventors:

Tayung Wong - Fremont CA
John Carrillo - San Jose CA
Jay Robinson - Sunnyvale CA
Clement Fang - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G11C 502

US Classification:

365 51, 365193, 36523003

Abstract:

A memory expansion module including multiple memory banks and a bank control circuit is disclosed. In one embodiment, a memory module includes a printed circuit board with a connector edge adapted for insertion in an expansion socket of a computer system. Mounted upon the circuit board is a plurality of memory chips, typically Dynamic Random Access Memory (DRAM) chips, which make up an upper bank and a lower bank of memory. A buffer circuit is mounted upon the printed circuit board, for the purpose of driving address signals, Column Address Strobe (CAS) signals, and write enable signals to each of the memory chips. Also mounted upon the printed circuit board is a bank control circuit, which is coupled to the memory chips. An address signal is used as a bank selection input to the bank control circuit, which will drive Row Address Strobe (RAS) signals to the memory chips of the selected memory bank. The bank control circuit is further configured to drive RAS signals to both banks simultaneously during CBR (CAS before RAS) refresh operations, which occur when a CAS signal is asserted before a RAS signal.

US Patent:

6683372, Jan 27, 2004

Filed:

Nov 18, 1999

Appl. No.:

09/442850

Inventors:

Tayung Wong - Fremont CA
John Carrillo - San Jose CA
Jay Robinson - Sunnyvale CA
Clement Fang - Cupertino CA
David Jeffrey - Santa Cruz CA
Nikhil Vaidya - Mountain View CA
Nagaraj Mitty - San Jose CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

H01L 2300

US Classification:

257686, 257723, 257777

Abstract:

A memory expansion module with stacked memory packages. A memory module is implemented using stacked memory packages. Each of the stacked memory packages contains multiple memory chips, typically DRAMs (dynamic random access memory). The memory may be organized into multiple banks, wherein a given memory chip within a stacked memory package is part of one bank, while another memory chip in the same package is part of another bank. The memory module also includes a clock driver chip and a storage unit. The storage unit is configured to store module identification information, such as a serial number. The storage unit is also configured to store information correlating electrical contact pads on the module with individual signal pins on the stacked memory packages. This may allow an error to be quickly traced to a specific pin on a stacked memory package when an error is detected on the memory bus by an error correction subsystem.

US Patent:

20030090879, May 15, 2003

Filed:

Jun 14, 2002

Appl. No.:

10/171867

Inventors:

Drew Doblar - San Jose CA, US
Han Ko - Milpitas CA, US
Lam Dong - Union City CA, US
Clement Fang - Cupertino CA, US
David Jeffrey - Santa Cruz CA, US
Tayung Wong - Fremont CA, US
Jay Robinson - Sunnyvale CA, US
John Carrillo - San Jose CA, US
Nagaraj Mitty - San Jose CA, US
Nikhil Vaidya - San Francisco CA, US

International Classification:

H05K007/00
G06F012/00

US Classification:

361/728000, 711/167000

Abstract:

A memory module for expanding memory of a computer. The memory module comprises a printed circuit board including a connector edge having a plurality of contact pads configured to convey data signals, power and ground to and from said printed circuit board. The power and ground contact pads alternate along said connector edge with no more than four adjacent data signal contact pads without intervening power or ground contact pads. A plurality of memory devices mounted on the printed circuit board. A clock driver is coupled to each of the plurality of memory devices and is configured to receive a differential clock signal and to produce at least one single-ended clock signal for clocking the plurality of memory devices. The clock driver includes a phase-locked loop for phase-locking the at least one single-ended clock signal.

US Patent:

55047009, Apr 2, 1996

Filed:

Feb 22, 1994

Appl. No.:

8/199714

Inventors:

Mark Insley - Sunnyvale CA
Stephen Berry - Littleton MA
Jay C. Robinson - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

G11C 504

US Classification:

365 52

Abstract:

The invention provides a method and apparatus for a memory device interface between a memory device and a CPU as well as the dimensions of the memory device. An electric circuit of the present invention has one-hundred-twenty pins along the length of the housing. The housing of the memory device has a length of approximately 85. 6 mm and a width of approximately 54. 0 mm. The left and right side socket interface portions of the housing have a minimum width of approximately 3. 3 mm. The top socket interface portion has a maximum thickness of approximately 3. 5 mm and a minimum height of approximately 3. 0 mm. The bottom socket interface portion has a maximum thickness of approximately 5. 0 mm and a minimum height of approximately 10. 5 mm. Furthermore, the memory device interface portion of the present invention includes at least one pin which provides access to an address signal which indicates a memory array address location within the memory device.

US Patent:

20210350354, Nov 11, 2021

Filed:

May 14, 2021

Appl. No.:

17/320915

Inventors:

- Chicago IL, US
Robert James Skillington - San Francisco CA, US
Jay Walter Robinson - Palo Alto CA, US
Tuomas Santeri Artman - San Francisco CA, US
Cristian Matias Sepulveda - San Francisco CA, US
Joshua Isaac Zloof - San Francisco CA, US
Leslie Jean Chicoine - San Francisco CA, US
Mahmudul Arefin Din - San Francisco CA, US

International Classification:

G06Q 20/32
G06Q 20/20
G06Q 20/36
G06Q 20/40

Abstract:

Various systems, apparatuses, and methods are described herein for enabling secure communication protocols for proximity-based validation in distributed multi-device frameworks. Distributed multi-device frameworks present unique challenges when it comes to ensuring that user communications between various devices and over variable-security communication mediums remain secure. To address the noted challenges, some embodiments of the present invention provide for an apparatus configured to establish secure communications with a central system using wallet identifying data that is configured to secure data transfers between the apparatus and the central system. In accordance with some embodiments, devices communicating on proposed networks are arranged in a manner and using a network architecture that is configured to optimize overall network security and system integrity.

US Patent:

20170357622, Dec 14, 2017

Filed:

Sep 23, 2016

Appl. No.:

15/275088

Inventors:

- Cupertino CA, US
Alexander C. MacLean - San Jose CA, US
Brian J. Turner - Belvedere-Tiburon CA, US
Ian J. Elseth - Vancouver WA, US
Jay W. Robinson - Palo Alto CA, US
Shawn D. Moon - San Mateo CA, US
Steve E. Marmon - Mountain View CA, US
Vincent M. Lane - San Francisco CA, US
Wyatt Mitchell - San Francisco CA, US

International Classification:

G06F 17/21
G06Q 30/02
G06F 17/30
G06F 3/0485
G06F 3/0482
G06F 3/0488

Abstract:

Some embodiments provide a GUI for a document reader application that displays an aggregated feed with sections for different groups of personalized documents. Some embodiments provide a method for arranging documents within the different sections and for ordering the different sections within the aggregated feed. In some embodiments, the groups are dynamically generated at a device based on content (e.g., tags) of the documents.

US Patent:

20170357623, Dec 14, 2017

Filed:

Sep 23, 2016

Appl. No.:

15/275138

Inventors:

- Cupertino CA, US
Charles J. Migos - Millbrae CA, US
Brian James Turner - Belvedere-Tiburon CA, US
Jay W. Robinson - Palo Alto CA, US
Shawn D. Moon - San Mateo CA, US
Steve E. Marmon - Mountain View CA, US
Vincent M. Lane - San Francisco CA, US
Wyatt R. Mitchell - San Francisco CA, US

International Classification:

G06F 17/21
G06F 17/24
G06K 9/00
G06F 3/0481

Abstract:

Some embodiments provide a GUI for a document reader application that displays an aggregated feed with sections for different groups of personalized documents. Some embodiments provide a method for arranging documents within the different sections and for ordering the different sections within the aggregated feed. In some embodiments, the groups are dynamically generated at a device based on content (e.g., tags) of the documents.

Author:

Jay L. Robinson

ISBN #:

0867092521