Jason Hou

US Patent:

59954388, Nov 30, 1999

Filed:

Aug 7, 1998

Appl. No.:

9/130664

Inventors:

Terry Jeng - Saratoga CA
Chuan-Yu Wu - Keelung, TW
Jason Hou - Fremont CA

Assignee:

Powerchip Semiconductor Corp. - Hsin-Chu

International Classification:

G11C 800
G11C 700

US Classification:

36523003

Abstract:

A synchronous dynamic RAM capable of segmentally precharging each memory bank. In this SDRAM, each memory bank is divided into multiple memory blocks. Each of these memory blocks internally has its own row access circuitry, but performs independent precharging operation. Access to the memory bank can be cooperative externally, and precharge operation can be separately applied to these memory blocks while allowing utilization of row cache that is available on other blocks. The SDRAM further includes a control device for generating a dedicated precharge signal to each memory block according to a precharge signal for each memory bank. Each dedicated precharge signal independently precharges the corresponding memory block regardless of the access operations executed by other memory blocks. The dedicated precharge signal and a succeeding activate signal for activating a different memory block are overlapped in timing so that the precharge sequence is implanted in the succeeding activate signal and the data access time is shortened.

US Patent:

59369035, Aug 10, 1999

Filed:

Aug 7, 1998

Appl. No.:

9/130652

Inventors:

Terry Jeng - Saratoga CA
Chuan-Yu Wu - Keelung, TW
Jason Hou - Fremont CA

Assignee:

Powerchip Semiconductor Corp. - Hsin-chu

International Classification:

G11C 700

US Classification:

365203

Abstract:

A synchronous dynamic RAM capable of segmentally precharging each memory bank. In this SDRAM, each memory bank is divided into multiple memory blocks. Each of these memory blocks internally has its own row access circuitry, but performs independent precharging operation. Access to the memory bank can be cooperative externally, and precharge operation can be separately applied to these memory blocks while allowing utilization of row cache that is available on other blocks. The SDRAM further includes a control device for generating a dedicated precharge signal to each memory block according to a precharge signal for each memory bank. Each dedicated precharge signal independently precharges the corresponding memory block regardless of the access operations executed by other memory blocks. The dedicated precharge signal and a succeeding activate signal for activating a different memory block are overlapped in timing so that the precharge sequence is implanted in the succeeding activate signal and the data access time is shortened.

US Patent:

58257101, Oct 20, 1998

Filed:

Feb 26, 1997

Appl. No.:

8/806828

Inventors:

Terry Jeng - Saratoga CA
Chuan-Yu Wu - Keelung, TW
Jason Hou - Fremont CA

Assignee:

Powerchip Semiconductor Corp. - Hsin-Chu

International Classification:

G11C 700

US Classification:

36523003

Abstract:

A synchronous dynamic RAM capable of segmentally precharging each memory bank. In this SDRAM, each memory bank is divided into multiple memory blocks. Each of these memory blocks internally has its own row access circuitry, but performs independent precharging operation. Access to the memory bank can be cooperative externally, and precharge operation can be separately applied to these memory blocks while allowing utilization of row cache that is available on other blocks. The SDRAM further includes a control device for generating a dedicated precharge signal to each memory block according to a precharge signal for each memory bank. Each dedicated precharge signal independently precharges the corresponding memory block regardless of the access operations executed by other memory blocks. The dedicated precharge signal and a succeeding activate signal for activating a different memory block are overlapped in timing so that the precharge sequence is implanted in the succeeding activate signal and the data access time is shortened.

US Patent:

20140226572, Aug 14, 2014

Filed:

Feb 13, 2013

Appl. No.:

13/766700

Inventors:

- San Diego CA, US
Jason Hou - Millbrae CA, US
Yoseph Malkin - Palo Alto CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

H04W 72/08

US Classification:

370329

Abstract:

A wireless access point (AP) stores a region code that identifies a country/region in which the wireless AP is designed to operate. This region code can be provided by the wireless AP vendor, or in response to information provided by the wireless AP user or a GPS receiver. In response to the region code, the wireless AP identifies one or more WiFi channels that are subject to interference within the region due to the non-WiFi wireless communication channels that are approved for use within the region. The wireless AP then selects a WiFi channel for wireless communication, wherein the wireless AP avoids selecting the WiFi channels identified as being subject to interference within the region.