James B Ngo

US Patent:

7360133, Apr 15, 2008

Filed:

May 18, 2004

Appl. No.:

10/847691

Inventors:

Saket Goyal - Milpitas CA, US
James Ngo - San Jose CA, US

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

G01R 31/3185
G01R 31/316

US Classification:

714726, 703 25

Abstract:

A method and system is provided for creating a tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool. Aspects of the present invention include during slice creation, using a software tool to create a test access port (TAP) from slice resources; during instance creation, allowing a customer to design a custom chip using the software tool to select which structures to use on the slice; and based on the customer selections, reconfiguring at the instance level connections between the tap controller and the selected structures.

US Patent:

6888367, May 3, 2005

Filed:

Jan 28, 2004

Appl. No.:

10/767314

Inventors:

Thai M. Nguyen - San Jose CA, US
James T. Ngo - San Jose CA, US
William Shen - San Jose CA, US

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

G01R031/26

US Classification:

324765

Abstract:

A method of testing a core module includes steps of: (a) providing a core module of an integrated circuit design; (b) connecting an end user input and a core module test input to separate I/O pins of the core module to isolate logic associated with an end user signal from that associated with a core module test signal; and (c) multiplexing the end user signal and the core module test signal in the core module in response to a core module test mode signal.