Dennis Lang - San Jose CA, US Sonbol Vaziri - Salt Lake City UT, US James Naylor - Kaysville UT, US Eric Woolsey - Salt Lake City UT, US Chung-Lin Wu - San Jose CA, US Mike Gruenhagen - Salt Lake City UT, US Neill Thornton - Corvallis OR, US
International Classification:
H01L 23/48 H01L 21/00
US Classification:
257738000, 438113000, 257E23010
Abstract:
A wafer level chip scale package (WLCSP) includes a packaged semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions, and encapsulation material surrounding the semiconductor die except for at least a portion of each of the solder bumps.
Dennis Lang - San Jose CA, US Sonbol Vaziri - Salt Lake City UT, US James Kent Naylor - Kaysville UT, US Eric Woolsey - Salt Lake City UT, US Chung-Lin Wu - San Jose CA, US Mike Gruenhagen - Salt Lake City UT, US Neill Thornton - Corvallis OR, US
International Classification:
H01L 23/498
US Classification:
257738, 257E2307
Abstract:
A wafer level chip scale package (WLCSP) includes a semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions.