Thomas K. Bohley - Colorado Springs CO Grosvenor H. Garnett - Colorado Springs CO Christopher Koerner - Longmont CO
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
H03M 166
US Classification:
341144
Abstract:
A plural channel indirect digital to analog converter. Words containing address bits and data bits are received on an input and entered into a specific one of the converter channels under control of the address bits of the word. The data bits are applied to a binary rate multiplier of the channel which generates a pulse modulated output signal representing the binary value of the received data bits. The pulse modulated output signal is applied to an associated filter which converts the pulse modulated signal to an analog output signal whose amplitude represents the binary value of the received data bits. Gating circuitry ensures that each output pulse is of a precisely controlled pulse width. One of the converter channels is used to calibrate the output level of the filters. The number of data bits applied to the different channels may need not be the same and may vary in number from a minimum of 1 to a maximum of m.
Thomas K. Bohley - Colorado Springs CO Grosvenor H. Garnett - Colorado Springs CO Christopher Koerner - Longmont CO Charles E. Moore - Loveland CO
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
H03M 182
US Classification:
341152
Abstract:
Pulse modulation circuitry which receives n binary data bits and generates a rate/width pulse modulated signal representing the binary value of the received data bits. The lower order m of the n bits generate a rate modulated signal having a number of pulses equal to the binary value of the m bits. The remainder of the n bits width modulate the rate modulated pulses. Each least significant bit increase in the binary value of the received date bits increases the width of a rate modulated pulse by a predetermined amount.