Glenn J Gulbranson

US Patent:

49221841, May 1, 1990

Filed:

Aug 29, 1988

Appl. No.:

7/237438

Inventors:

Leo M. Rosenstein - Lakeville MN
Glenn J. Gulbranson - Burnsville MN

Assignee:

Control Data Corporation - Minneapolis MN

International Classification:

G01R 1900
G01R 19165

US Classification:

324 725

Abstract:

An apparatus for simultaneously testing multiple integrated circuits includes a sensing circuit associated with each of the tested circuits. Each sensing circuit includes a differential amplifier with its positive input connected to the input of the test circuit, and its inversion input connected to the test circuit output. The test circuit input and positive amplifier input are biased to a selected voltage, and the voltage drop across the test circuit is provided to the amplifier inversion input. Whenever the test circuit is open, intermittently open or highly resistive, the voltage drop across the test circuit exceeds the threshold voltage of the differential amplifier, causing the amplifier to generate a high level logic output representing an open circuit condition. The outputs of the various sensing circuits together form a digital word representative of the condition of all of the test circuits. The outputs of the differential amplifiers also are provided to independent triggering circuitry for enabling the storage of sensing circuit outputs upon an open condition indicated for at least one of the test circuits.

US Patent:

51619865, Nov 10, 1992

Filed:

Oct 15, 1991

Appl. No.:

7/776818

Inventors:

Glenn J. Gulbranson - Burnsville MN
Steven J. Young - Excelsior MN
Gerald W. Kenealey - Minneapolis MN

Assignee:

Ceridian Corporation - Minneapolis MN

International Classification:

H01R 13643

US Classification:

439 92

Abstract:

Circuit apparatus comprises an integral structure of first and second multilayer wiring board portions and a flexible circuit portion. The wiring board portions each have at least circuit trace planes, ground planes and insulator planes. The flexible circuit portion includes at least one signal trace plane and at least one ground plane separated by at least one insulator plane; the singal trace plane of the flexible circuit portion being integral with a signal trace plane of each of the wiring board portions, the ground plane of the flexible circuit portion being integral with a ground plane of each of the wiring board portions, and the insulator plane of the flexible circuit portion being integral with an insulator plane of each of the wiring board portions. Selected ones of a plurality of electric contacts are connected to selected ones of the circuit traces of the circuit trace plane of the flexible circuit portions; others of the contacts being connected to the ground plane. A pin connector is conencted to the plurality of contacts and is arranged to electrically connect selected circuits traces and the ground plane of the flexible circuit portion to an interconnect backpanel, thereby electrically connecting the wiring board portions to the backpanel with minimum inductance.