Microsoft Corporation since Jan 2011
Senior Director, GSI SMB
Education:
Northwestern University - Kellogg School of Management 2011 - 2011
Universidad Eafit 1990 - 1992
Masters, Marketing
Universidad De Los Andes 1980 - 1986
Bachelors, Bachelor of Science
Skills:
Enterprise Software Strategic Partnerships Strategy Management Saas Product Management Cloud Computing Strategic Alliances Business Alliances Product Marketing Pre Sales Business Intelligence Professional Services Channel Partners Cross Functional Team Leadership Solution Selling Infrastructure Business Strategy Team Leadership Leadership Partner Management Business Development Software As A Service Go To Market Strategy Start Ups Program Management Sales Enablement Multi Channel Marketing Marketing Government Mobile Devices Selling Sales It Strategy Outsourcing Demand Generation Channel Enterprise Architecture It Management Global Business Development Global Marketing Software Industry Smb Small and Medium Enterprises
Languages:
Spanish English
Certifications:
Microsoft Global Challenger Certified Prosci Change Practitioner
Trident Refit Facility
Material Handler
Us Navy Aug 2012 - Aug 2015
Trident Refit Facility Submarine Logistics Supervisor-Logistics Specialist Frist Class
Naval Ordnance Test Unit Aug 1999 - Dec 2012
Store Keeper
Uss Oklahoma City Ssn-715 May 2009 - Jul 2012
Logistics Specialist Leading Petty Ofiicer
Fisc Kitsap Mar 2006 - Mar 2009
Logistics Specialist Leading Petty Officer
Skills:
Leadership Military Security Clearance Microsoft Office Military Operations Military Experience Training Program Management Customer Service Dod Logistics Operations Management Operational Planning Supervisory Skills Project Planning Logistics Management Microsoft Excel Microsoft Word Supply Chain Management Government Inventory Management Budgets Teamwork Organizational Leadership Outlook Military Training Security Materials Management Inventory Control Inspection Transportation Windows Supply Chain Purchasing Project Management Procurement Team Management
Sep 2014 to 2000 Security Guard Officer1199 housing corporation Manhattan, NY Feb 2013 to Mar 2014 Security Guard OfficerEmpire kosher Brooklyn, NY Aug 2010 to Feb 2011 Supermarket
Education:
Suny Brooklyn Educational Opportunity Center Brooklyn, NY 2013 to 2014 GED DiplomaInternational high school at prospect heights Brooklyn, NY 2006 to 2008middle school: PS 189 Brooklyn, NY 2004 to 2006
Sep 2011 to Present Senior Analyst - IndustrialsCarlson Capital Dallas, TX Jul 2008 to Feb 2011 Senior Analyst - IndustrialsMerrill Lynch New York, NY May 2006 to Jun 2008 Associate - Automotive Equity ResearchCambridge Associates Boston, MA Jul 2004 to May 2006 Consulting AssociateCredit Suisse First Boston New York, NY Jun 2003 to Aug 2003 Financial Institutions Group Investment Banking Analyst
Education:
Tufts University Medford, MA May 2004 Bachelor of Arts in Spanish
Gabriel A. Rincon - Margate FL Nicolas Salamina - Dallas TX Marco Corsi - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 10 G06G 712 H03G 345 G05F 316
US Classification:
327108
Abstract:
An amplifier circuit (10) is provided. Amplifier (10) has an amplifier stage (14) that is coupled to control an output stage (18). Output stage (18) includes a sourcing circuit (20) and a sinking circuit (22). Output stage (18) also includes a mirror circuit (42) that is coupled to an output of amplifier stage (14). Output stage (18) also includes a current balancing circuit (30) coupled to mirroring circuit (42) and sourcing circuit (20). Mirroring circuit (42) draws current from balancing circuit (30) in response to a first predetermined output from amplifier stage (14) such that balancing circuit (30) causes an insignificant current to flow in sourcing circuit (20). Thus amplifier (10) operates to sink current from an external load (12). Alternatively, mirroring circuit (42) may draw an insignificant current from balancing circuit (30) in response to a second predetermined output of the amplifier stage (14). This causes a significant current flow in sourcing circuit (20).
Cross Coupled Quad Comparator For Current Sensing Independent Of Temperature
Marco Corsi - Dallas TX Gabriel A. Rincon - Margate FL
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 5153
US Classification:
327 80
Abstract:
A circuit and method for sensing and limiting current. A resistor (R1) is used to generate a voltage (V1) proportional to the current flowing in an output transistor (M1). A comparator is formed in a cross coupled quad configuration from bipolar transistors (Q11, Q12, Q13 and Q14) and is coupled to the resistor (R1). When the current in the resistor (R1) generates a voltage in excess of a threshold voltage for the cross coupled quad circuit, the cross coupled quad generates an output indicating the threshold has been reached. In a current limiting configuration, the output of the cross coupled quad is used to reset a flip-flop (FF1) that drives the gate terminal of the output transistor (M1), thus shutting down the output transistor before it is damaged due to excess current. The threshold voltage that triggers the cross coupled quad is proportional-to-absolute-temperature. This property allows the comparator to be combined with an aluminum resistor (R1) to form a current sensing circuit that has a threshold current that is independent of temperature, since the temperature coefficient of the resistor will cancel the temperature coefficient of the comparator.
Controlled Current Output Stage Amplifier Circuit And Method
Gabriel A. Rincon - Margate FL Nicolas Salamina - Dallas TX Marco Corsi - Dallas TX
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03F 326
US Classification:
330273
Abstract:
An amplifier circuit (10) is provided. The amplifier (10) includes an amplifier stage (14) coupled to an output stage (18). Output stage (18) comprises a sourcing circuit (20) and a sinking circuit (22). The current in sinking circuit (22) is approximately mirrored at low current in mirror circuit (34). At higher currents, resistor (36) maintains the current in mirror circuit (34) below the current in sinking circuit (22). A diode (38) diverts current to mirror circuit (34) to aid sinking circuit (22) in sinking current from a load (12). A current source (29) supplies current to sourcing circuit (20) and mirror circuit (34). A control signal output by amplifier stage (14) causes mirror circuit (34) to draw or not draw current from current source (29). If mirror circuit (34) draws current from current source (29), output stage (18) sinks current in sinking circuit (22). If mirror circuit (34) does not draw current from current source (29), output stage (18) sources current through sourcing circuit (20).
Low Drop-Out Voltage Regulator With Pmos Pass Element
Marco Corsi - Plano TX Robert B. Borden - Plano TX Michael R. Kay - Greensboro NC Nicolas Salamina - Dallas TX Gabriel A. Rincon - Margate FL
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G05F 316
US Classification:
323316
Abstract:
A voltage regulator circuit includes: a first MOS transistor 12 coupled between a voltage supply line and an output node 44, the first MOS transistor 12 providing a stable voltage on the output node 44; a source follower 24 coupled to a gate of the first MOS transistor 12; an amplifier 38 coupled to a gate of the source follower 24 for controlling the response of the first MOS transistor 12; negative feedback circuitry coupled between the output node 44 and the amplifier 38, the feedback circuitry providing feedback to the amplifier 38; a current conveyer 46 coupled to the first MOS transistor 12; and positive feedback circuitry 26 coupled between the current conveyer 46 and the source follower 24.
Marco Corsi - Dallas TX Gabriel A. Rincon - Margate FL
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
G05F 110
US Classification:
327 55
Abstract:
A circuit and method for sensing and limiting current. An output driving transistor (M1) is coupled between a circuit output terminal and a power supply terminal. A replicator circuit is formed in a cross-coupled quad configuration from bipolar transistors (Q11, Q12, Q13 and Q14) and is coupled to a second transistor (M2) which generals a voltage proportional to the current flowing in the output driving transistor (M1). The current sensing circuit generates an output current which is proportional to the current flowing in the output driving transistor multiplied by a ratio of the sizes of the second transistor and the output driving transistor. In a current limiting configuration, the output of the cross-coupled quad is used to reset a flip-flop (FF1) that drives the gate terminal of the output transistor (M1), thus shutting down the output transistor before it is damaged due to excess current. The circuitry of the invention may be applied to a high side driver or a low side driver output circuit. Other embodiments are also described.