Evandro C Menezes

US Patent:

6845456, Jan 18, 2005

Filed:

Jul 16, 2001

Appl. No.:

09/906915

Inventors:

Evandro Menezes - Austin TX, US
David F. Tobias - Pflugerville TX, US
Richard Russell - Austin TX, US
Morrie Altmejd - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 126
G06F 132

US Classification:

713320, 713323

Abstract:

A computer system that has multiple performance states periodically obtains utilization information for a plurality of tasks operating on the processor and determines processor utilization according to the utilization information for the plurality of tasks. The system compares the processor utilization to at least one threshold and selectively adjusts a current processor performance state to another performance state according to the comparison.

US Patent:

6895520, May 17, 2005

Filed:

Mar 2, 2001

Appl. No.:

09/798176

Inventors:

Morrie Altmejd - Austin TX, US
Evandro Menezes - Austin TX, US
Dave Tobias - Pflugerville TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F001/32
G06F001/26

US Classification:

713324, 713320

Abstract:

An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.

US Patent:

6950926, Sep 27, 2005

Filed:

Mar 2, 2001

Appl. No.:

09/798177

Inventors:

Evandro Menezes - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F009/30

US Classification:

712216

Abstract:

A dependency instruction encodes dependency information among a group of instructions. A processor decodes the dependency instruction associated with the group of instructions. The processor can then execute the group of instructions in an order based on the dependency information in the dependency instruction. The dependency information may be encoded in a neutral instruction so processors that do not support dependency instructions can execute a program containing them.

US Patent:

7127446, Oct 24, 2006

Filed:

Oct 30, 2002

Appl. No.:

10/283901

Inventors:

Evandro Menezes - Austin TX, US
Harsha Jagasia - Austin TX, US
Morrie Altmejd - Austin TX, US
David Tobias - Pflugerville TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 9/44
G06F 17/30
G06F 12/00
G06F 15/16

US Classification:

707 1, 707 10, 707200, 718102, 709201

Abstract:

A task queue management technique leverages infrastructure provided by file and operating systems to manage task queues substantially without otherwise typical problems regarding management of the size of the queue and/or the state of the queue (e. g. , empty or full) while maintaining, regulating and altering the queue and the order of tasks in the queue. Task producer code is configurable to cause one or more executable files corresponding to each of one or more tasks to be stored in a queue directory responsive to receiving the one or more tasks. A file system associates each executable file with a time stamp indicating when the executable file was stored. Task consumer code is configurable to execute the one or more executable files in an order indicated by the time stamps associated with the executable files and to remove each executable file after execution of each executable file.

US Patent:

7254721, Aug 7, 2007

Filed:

Jun 7, 2001

Appl. No.:

09/876291

Inventors:

David F. Tobias - Pflugerville TX, US
Evandro Menezes - Austin TX, US
Richard Russell - Austin TX, US
Morrie Altmejd - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 1/00
G06F 1/32

US Classification:

713300, 713320, 713322

Abstract:

A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

US Patent:

7254812, Aug 7, 2007

Filed:

May 31, 2002

Appl. No.:

10/159345

Inventors:

Evandro Menezes - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 9/46
G06F 1/26

US Classification:

718102, 718100, 718105, 713320

Abstract:

An information processing system is configured to schedule tasks to a plurality of processors using processor performance information. For example, the maximum performance level of each of the processors, the current performance level of each of the processors, and the number of processors can be used to schedule tasks to one or more of the processors. A task distribution frequency which takes this information into account can be useful. One such task distribution frequency fis calculated so that f=D/ΣDwhere i ranges from 1-N and D=MP/CP/N, where MPis a maximum performance level for the processor i, CPis a current performance level for the processor i, and N is the number of processors. Tasks are distributed according to the task distribution frequency f.

US Patent:

7647513, Jan 12, 2010

Filed:

Jul 3, 2007

Appl. No.:

11/773144

Inventors:

David F. Tobias - Pflugerville TX, US
Evandro Menezes - Austin TX, US
Richard Russell - Austin TX, US
Morrie Altmejd - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 1/00
G06F 1/26
G06F 1/32

US Classification:

713300, 713320, 713322

Abstract:

A computer system has multiple performance states. The computer system periodically determines utilization information for the computer system and adjusts the performance state according to the utilization information. If a performance increase is required, the computer system always goes to the maximum performance state. If a performance decrease is required, the computer system steps the performance state down to a next lower performance state.

US Patent:

8045548, Oct 25, 2011

Filed:

Mar 29, 2002

Appl. No.:

10/113340

Inventors:

Evandro Menezes - Austin TX, US
Dave Tobias - Pflugerville TX, US
Morrie Altmejd - Austin TX, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H04L 12/28

US Classification:

370389, 370392, 370401

Abstract:

A transaction is sent over a communication link to a receiving node. The transaction includes data along with a tag identifying a data type of the data. The receiving node either forwards or processes the data according to whether the data type matches the type of data type processed by circuitry associated with the receiving node. Thus, a destination is determined for data transported on the communication link using a data type identifier sent with the data.