Ethan E Crain

US Patent:

6813209, Nov 2, 2004

Filed:

Oct 14, 2003

Appl. No.:

10/685371

Inventors:

Ethan A. Crain - Cambridge MA
Karl Rapp - Los Gatos CA
Etan Shacham - Cupertino CA

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

G11C 702

US Classification:

365208, 36518907, 365192, 327 53, 327 61, 327 66

Abstract:

A low read current, low power consumption sense amplifier well suited for low frequency RFID systems is disclosed. An MOS transistor receives the read current from a memory cell, typically an EEPROM, and a current mirror is formed by a parallel MOS transistor. The mirror current is integrated on a capacitor after the charge on the capacitor is cleared via a reset pulse. A time period is defined during which the voltage on the capacitor is compared to a second voltage. The second voltage is formed from a reference voltage or from dummy cells, in either case the reference voltage is at about the logic boundary between a one and zero stored in a memory cell. A comparator, with or without input hysteresis, receives the voltage on the capacitor and a second voltage and within the time period, the output state of the comparator indicates the binary contents of the memory cell.

US Patent:

20040080367, Apr 29, 2004

Filed:

Oct 29, 2002

Appl. No.:

10/282569

Inventors:

Ethan Crain - Cambridge MA, US
Pravas Pradhan - South Portland ME, US

International Classification:

H03F003/45

US Classification:

330/253000

Abstract:

A folder common cascode circuit with symmetric parallel signal paths from the differential inputs to the differential outputs provides a low skew, low jitter, low power differential amplifier. The signal paths on either side of the differential amplifier are made equal with equal loads along each path. Pairs of complementary NODS and PODS transistor pairs with parallel complementary biasing stacks on the output cascode circuitry maintain symmetrical parallel signal paths, amplification and impedance loading from differential input to differential output. Output voltage translating inverters provide a higher voltage level output signal while maintaining low skew and jitter.