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Ernesto Jaritz

age ~53

from Cedar Rapids, IA

Also known as:
  • Ernesto Varitz
Phone and address:
1306 Acacia Dr NE, Cedar Rapids, IA 52402
319 730-1843

Ernesto Jaritz Phones & Addresses

  • 1306 Acacia Dr NE, Cedar Rapids, IA 52402 • 319 730-1843
  • 3120 John Olsen Ave, Hillsboro, OR 97124
  • 17610 Cornell Rd, Beaverton, OR 97006 • 503 439-3020
  • 105 Avery St, Stamford, CT 06902
  • 28 Thorpe St, Fairfield, CT 06430 • 203 256-9124
  • Shelton, CT
  • 1306 Acacia Dr NE, Cedar Rapids, IA 52402

Education

  • Degree:
    High school graduate or higher

Skills

Rtl Design • Verilog • Vhdl • Specman • Microarchitecture • Vera • Asic • Soc • Fpga • Functional Verification • Vlsi • Systemverilog • Static Timing Analysis • Tcl • Embedded Systems • Ic • Debugging • Rtl Coding • Modelsim • Mixed Signal • Logic Analyzer • Signal Integrity

Languages

Spanish • English

Industries

Aviation & Aerospace

Us Patents

  • Method And Apparatus For Correcting Imperfectly Equalized Bipolar Signals

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  • US Patent:
    62716980, Aug 7, 2001
  • Filed:
    Nov 17, 1999
  • Appl. No.:
    9/441976
  • Inventors:
    Barry L. Stakely - Snowcamp NC
    Ernesto Jaritz - Shelton CT
    Phillip R. Epley - Raleigh NC
    Alexis Shishkoff - Raleigh NC
  • Assignee:
    Transwitch Corp - Shelton CT
  • International Classification:
    H03K 501
  • US Classification:
    327164
  • Abstract:
    An apparatus for correcting imperfectly equalized bipolar signals includes a delay line having a reset control, an AND gate, and a one-shot multivibrator. The apparatus is used in conjunction with an adaptive equalizer with the output of the adaptive equalizer being coupled to the input of the apparatus of the invention. More particularly, the output of the equalizer is coupled to the input and reset of the delay as well as to one input of the AND gate. The output of the delay line is coupled to the other input of the AND gate. The output of the AND gate is coupled to the input of the one-shot multivibrator and the output of the one-shot multivibrator is the corrected signal. The delay line is approximately equal to the pulse width of an erroneous pulse which is expected from over-equalization. When the delayed signal is compared to the original signal via the AND gate, narrow pulses are removed from the signal. The one-shot multivibrator is configured such that each pulse entering it from the output of the AND gate cause a pulse of a set length to be generated by the one-shot multivibrator.

Resumes

Ernesto Jaritz Photo 1

Ernesto Jaritz

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Location:
Cedar Rapids, IA
Industry:
Aviation & Aerospace
Skills:
Rtl Design
Verilog
Vhdl
Specman
Microarchitecture
Vera
Asic
Soc
Fpga
Functional Verification
Vlsi
Systemverilog
Static Timing Analysis
Tcl
Embedded Systems
Ic
Debugging
Rtl Coding
Modelsim
Mixed Signal
Logic Analyzer
Signal Integrity
Languages:
Spanish
English

Youtube

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